diff options
| author | Ingo Molnar <mingo@kernel.org> | 2024-03-25 11:29:16 +0100 |
|---|---|---|
| committer | Ingo Molnar <mingo@kernel.org> | 2024-03-25 11:29:16 +0100 |
| commit | 91491e5fb09624116950f9f2e1767a42e1da7868 (patch) | |
| tree | 77f5adde77d51d90b9b291db1c05369fc7b36a58 /Documentation | |
| parent | 4cece764965020c22cff7665b18a012006359095 (diff) | |
Documentation/x86: Fix title underline length
Fix:
Documentation/arch/x86/resctrl.rst:577: WARNING: Title underline too short.
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: Tony Luck <tony.luck@intel.com>
Link: https://lore.kernel.org/r/20240325121750.265d655c@canb.auug.org.au
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/arch/x86/resctrl.rst | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/arch/x86/resctrl.rst b/Documentation/arch/x86/resctrl.rst index 3712d81cb50c..6c245582d8fb 100644 --- a/Documentation/arch/x86/resctrl.rst +++ b/Documentation/arch/x86/resctrl.rst @@ -574,7 +574,7 @@ Memory b/w domain is L3 cache. MB:<cache_id0>=bandwidth0;<cache_id1>=bandwidth1;... Memory bandwidth Allocation specified in MiBps ---------------------------------------------- +---------------------------------------------- Memory bandwidth domain is L3 cache. :: |