diff options
| author | Stefan Brüns <stefan.bruens@rwth-aachen.de> | 2017-09-28 03:49:23 +0200 |
|---|---|---|
| committer | Vinod Koul <vinod.koul@intel.com> | 2017-10-16 12:31:24 +0530 |
| commit | d93cc0e7888a7c650a9155ad70e2236d15785c1e (patch) | |
| tree | f819f65a3b9b33c17d8594249ce4a8da8e4c15e8 /Documentation/devicetree/bindings/dma | |
| parent | 500fa9e76bbc40c7dbb65c7daccdc8bc49684429 (diff) | |
arm64: allwinner: a64: Add devicetree binding for DMA controller
The A64 is register compatible with the H3, but has a different number
of dma channels and request ports.
Attach additional properties to the node to allow future reuse of the
compatible for controllers with different number of channels/requests.
If dma-requests is not specified, the register layout defined maximum
of 32 is used.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'Documentation/devicetree/bindings/dma')
| -rw-r--r-- | Documentation/devicetree/bindings/dma/sun6i-dma.txt | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/dma/sun6i-dma.txt b/Documentation/devicetree/bindings/dma/sun6i-dma.txt index 98fbe1a5c6dd..9700b1d00fed 100644 --- a/Documentation/devicetree/bindings/dma/sun6i-dma.txt +++ b/Documentation/devicetree/bindings/dma/sun6i-dma.txt @@ -27,6 +27,32 @@ Example: #dma-cells = <1>; }; +------------------------------------------------------------------------------ +For A64 DMA controller: + +Required properties: +- compatible: "allwinner,sun50i-a64-dma" +- dma-channels: Number of DMA channels supported by the controller. + Refer to Documentation/devicetree/bindings/dma/dma.txt +- all properties above, i.e. reg, interrupts, clocks, resets and #dma-cells + +Optional properties: +- dma-requests: Number of DMA request signals supported by the controller. + Refer to Documentation/devicetree/bindings/dma/dma.txt + +Example: + dma: dma-controller@1c02000 { + compatible = "allwinner,sun50i-a64-dma"; + reg = <0x01c02000 0x1000>; + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_DMA>; + dma-channels = <8>; + dma-requests = <27>; + resets = <&ccu RST_BUS_DMA>; + #dma-cells = <1>; + }; +------------------------------------------------------------------------------ + Clients: DMA clients connected to the A31 DMA controller must use the format |