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authorLennert Buytenhek <buytenh@wantstofly.org>2008-03-27 14:51:40 -0400
committerNicolas Pitre <nico@marvell.com>2008-03-27 14:51:40 -0400
commitda14d88e90d476b315e5e9c3e3ffa940cb670c6d (patch)
treea9d59081bc2c84d7c56f30f73535c827a9ff14fa
parent98f79d1ea0459b907f95846bad5e967a06b7a0d5 (diff)
Orion: describe physical address map
Include a table describing our physical address map in orion.h. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Reviewed-by: Tzachi Perelstein <tzachi@marvell.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Nicolas Pitre <nico@marvell.com>
-rw-r--r--include/asm-arm/arch-orion/orion.h18
1 files changed, 15 insertions, 3 deletions
diff --git a/include/asm-arm/arch-orion/orion.h b/include/asm-arm/arch-orion/orion.h
index 884f3e2717d0..95f67081bb9c 100644
--- a/include/asm-arm/arch-orion/orion.h
+++ b/include/asm-arm/arch-orion/orion.h
@@ -15,13 +15,25 @@
#define __ASM_ARCH_ORION_H__
/*****************************************************************************
- * Orion Address Map
+ * Orion Address Maps
+ *
+ * phys
+ * e0000000 PCIe MEM space
+ * e8000000 PCI MEM space
+ * f0000000 PCIe WA space (Orion-1/Orion-NAS only)
+ * f1000000 on-chip peripheral registers
+ * f2000000 PCIe I/O space
+ * f2100000 PCI I/O space
+ * f4000000 device bus mappings (boot)
+ * fa000000 device bus mappings (cs0)
+ * fa800000 device bus mappings (cs2)
+ * fc000000 device bus mappings (cs0/cs1)
*
* virt phys size
* fdd00000 f1000000 1M on-chip peripheral registers
* fde00000 f2000000 1M PCIe I/O space
* fdf00000 f2100000 1M PCI I/O space
- * fe000000 f0000000 16M PCIe WA space (Orion-NAS only)
+ * fe000000 f0000000 16M PCIe WA space (Orion-1/Orion-NAS only)
****************************************************************************/
#define ORION_REGS_PHYS_BASE 0xf1000000
#define ORION_REGS_VIRT_BASE 0xfdd00000
@@ -37,7 +49,7 @@
#define ORION_PCI_IO_BUS_BASE 0x00100000
#define ORION_PCI_IO_SIZE SZ_1M
-/* Relevant only for Orion-NAS */
+/* Relevant only for Orion-1/Orion-NAS */
#define ORION_PCIE_WA_PHYS_BASE 0xf0000000
#define ORION_PCIE_WA_VIRT_BASE 0xfe000000
#define ORION_PCIE_WA_SIZE SZ_16M