diff options
| author | Tudor Ambarus <tudor.ambarus@microchip.com> | 2020-12-07 15:59:58 +0200 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2020-12-07 14:18:06 +0000 |
| commit | d00364b6a60475cd75fd07e847ad6f955952638b (patch) | |
| tree | 3769483b75a0a6b212e555fbe6b3de7d8598270c | |
| parent | a6ff3a784ff9975dc77676827a2f448203511d19 (diff) | |
spi: atmel-quadspi: Write QSPI_IAR only when needed
The address must be written in QSPI_IAR only when we have
a instruction frame with address but no data.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20201207135959.154124-4-tudor.ambarus@microchip.com
Signed-off-by: Mark Brown <broonie@kernel.org>
| -rw-r--r-- | drivers/spi/atmel-quadspi.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/spi/atmel-quadspi.c b/drivers/spi/atmel-quadspi.c index 7fb302e4063d..3a978ee8b70f 100644 --- a/drivers/spi/atmel-quadspi.c +++ b/drivers/spi/atmel-quadspi.c @@ -385,9 +385,11 @@ static int atmel_qspi_set_cfg(struct atmel_qspi *aq, /* Clear pending interrupts */ (void)atmel_qspi_read(aq, QSPI_SR); - if (aq->caps->has_ricr) { - /* Set QSPI Instruction Frame registers */ + /* Set QSPI Instruction Frame registers. */ + if (op->addr.nbytes && !op->data.nbytes) atmel_qspi_write(iar, aq, QSPI_IAR); + + if (aq->caps->has_ricr) { if (op->data.dir == SPI_MEM_DATA_IN) atmel_qspi_write(icr, aq, QSPI_RICR); else @@ -397,8 +399,6 @@ static int atmel_qspi_set_cfg(struct atmel_qspi *aq, if (op->data.nbytes && op->data.dir == SPI_MEM_DATA_OUT) ifr |= QSPI_IFR_SAMA5D2_WRITE_TRSFR; - /* Set QSPI Instruction Frame registers */ - atmel_qspi_write(iar, aq, QSPI_IAR); atmel_qspi_write(icr, aq, QSPI_ICR); atmel_qspi_write(ifr, aq, QSPI_IFR); } |