diff options
| author | MD Danish Anwar <danishanwar@ti.com> | 2024-06-14 15:38:29 +0530 |
|---|---|---|
| committer | Vignesh Raghavendra <vigneshr@ti.com> | 2024-06-19 22:49:54 +0530 |
| commit | 5fb89782a9e94936c14f2621637ef9df7c4ac0f0 (patch) | |
| tree | 1b02ce7330134925c7a441acd6e85a9788e68750 | |
| parent | 175133a32b48a092363828ce3041a0adaab01ffc (diff) | |
arm64: dts: ti: k3-am642-evm: Enable "SYNC_OUT0" output
The IEP0 SYNC_OUT0 pins are used for PPS out on AM64 EVM.
Configure its PINMUX here.
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
Link: https://lore.kernel.org/r/20240614100829.3919008-1-danishanwar@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
| -rw-r--r-- | arch/arm64/boot/dts/ti/k3-am642-evm.dts | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts index 9f691ed97791..6bb1ad2e56ec 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts @@ -466,6 +466,12 @@ AM64X_IOPAD(0x00f4, PIN_INPUT, 2) /* (Y9) PRG1_PRU0_GPO15.PRG1_RGMII1_TX_CTL */ >; }; + + icssg1_iep0_pins_default: icssg1-iep0-default-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x0104, PIN_OUTPUT, 2) /* (W7) PRG1_PRU0_GPO19.PRG1_IEP0_EDC_SYNC_OUT0 */ + >; + }; }; &main_uart0 { @@ -821,3 +827,8 @@ &gpmc0 { ranges = <0 0 0x00 0x51000000 0x01000000>; /* CS0 space. Min partition = 16MB */ }; + +&icssg1_iep0 { + pinctrl-names = "default"; + pinctrl-0 = <&icssg1_iep0_pins_default>; +}; |