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authorJayesh Choudhary <j-choudhary@ti.com>2024-06-26 15:46:43 +0530
committerVignesh Raghavendra <vigneshr@ti.com>2024-07-01 21:36:06 +0530
commit5095ec4aa1ea3d253c09486eaab42fa1a8b48c9a (patch)
tree6cc9b8196e3552b34d6a2218f5281bdc787aa8d8
parente569152274fec9ffdd3cf40d865d2b21ce46f75b (diff)
arm64: dts: ti: k3-j784s4-main: Add McASP nodes
Add McASP 0-4 instances and keep them disabled because several required properties are missing as they are board specific. Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> Link: https://lore.kernel.org/r/20240626101645.36764-2-j-choudhary@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
-rw-r--r--arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi90
1 files changed, 90 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
index a3e91ff87b4a..7e10be314684 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
@@ -2683,4 +2683,94 @@
*/
};
};
+
+ mcasp0: mcasp@2b00000 {
+ compatible = "ti,am33xx-mcasp-audio";
+ reg = <0x00 0x02b00000 0x00 0x2000>,
+ <0x00 0x02b08000 0x00 0x1000>;
+ reg-names = "mpu","dat";
+ interrupts = <GIC_SPI 544 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 545 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tx", "rx";
+ dmas = <&main_udmap 0xc400>, <&main_udmap 0x4400>;
+ dma-names = "tx", "rx";
+ clocks = <&k3_clks 265 0>;
+ clock-names = "fck";
+ assigned-clocks = <&k3_clks 265 0>;
+ assigned-clock-parents = <&k3_clks 265 1>;
+ power-domains = <&k3_pds 265 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
+ };
+
+ mcasp1: mcasp@2b10000 {
+ compatible = "ti,am33xx-mcasp-audio";
+ reg = <0x00 0x02b10000 0x00 0x2000>,
+ <0x00 0x02b18000 0x00 0x1000>;
+ reg-names = "mpu","dat";
+ interrupts = <GIC_SPI 546 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 547 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tx", "rx";
+ dmas = <&main_udmap 0xc401>, <&main_udmap 0x4401>;
+ dma-names = "tx", "rx";
+ clocks = <&k3_clks 266 0>;
+ clock-names = "fck";
+ assigned-clocks = <&k3_clks 266 0>;
+ assigned-clock-parents = <&k3_clks 266 1>;
+ power-domains = <&k3_pds 266 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
+ };
+
+ mcasp2: mcasp@2b20000 {
+ compatible = "ti,am33xx-mcasp-audio";
+ reg = <0x00 0x02b20000 0x00 0x2000>,
+ <0x00 0x02b28000 0x00 0x1000>;
+ reg-names = "mpu","dat";
+ interrupts = <GIC_SPI 548 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 549 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tx", "rx";
+ dmas = <&main_udmap 0xc402>, <&main_udmap 0x4402>;
+ dma-names = "tx", "rx";
+ clocks = <&k3_clks 267 0>;
+ clock-names = "fck";
+ assigned-clocks = <&k3_clks 267 0>;
+ assigned-clock-parents = <&k3_clks 267 1>;
+ power-domains = <&k3_pds 267 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
+ };
+
+ mcasp3: mcasp@2b30000 {
+ compatible = "ti,am33xx-mcasp-audio";
+ reg = <0x00 0x02b30000 0x00 0x2000>,
+ <0x00 0x02b38000 0x00 0x1000>;
+ reg-names = "mpu","dat";
+ interrupts = <GIC_SPI 550 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 551 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tx", "rx";
+ dmas = <&main_udmap 0xc500>, <&main_udmap 0x4500>;
+ dma-names = "tx", "rx";
+ clocks = <&k3_clks 268 0>;
+ clock-names = "fck";
+ assigned-clocks = <&k3_clks 268 0>;
+ assigned-clock-parents = <&k3_clks 268 1>;
+ power-domains = <&k3_pds 268 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
+ };
+
+ mcasp4: mcasp@2b40000 {
+ compatible = "ti,am33xx-mcasp-audio";
+ reg = <0x00 0x02b40000 0x00 0x2000>,
+ <0x00 0x02b48000 0x00 0x1000>;
+ reg-names = "mpu","dat";
+ interrupts = <GIC_SPI 552 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 553 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tx", "rx";
+ dmas = <&main_udmap 0xc501>, <&main_udmap 0x4501>;
+ dma-names = "tx", "rx";
+ clocks = <&k3_clks 269 0>;
+ clock-names = "fck";
+ assigned-clocks = <&k3_clks 269 0>;
+ assigned-clock-parents = <&k3_clks 269 1>;
+ power-domains = <&k3_pds 269 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
+ };
};