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path: root/include/linux/mlx5
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2022-01-06net/mlx5: Introduce API for bulk request and release of IRQsShay Drory1-2/+2
2021-12-31net/mlx5: DR, Ignore modify TTL if device doesn't support itYevgeny Kliteynik1-1/+1
2021-12-31net/mlx5: DR, Add support for matching on geneve_tlv_option_0_exist fieldYevgeny Kliteynik1-2/+4
2021-12-31net/mlx5: Add misc5 flow table match parametersMuhammad Sammar2-1/+25
2021-12-31net/mlx5: DR, Fix lower case macro prefix "mlx5_" to "MLX5_"Yevgeny Kliteynik1-1/+1
2021-12-16Merge branch 'mlx5-next' of git://git.kernel.org/pub/scm/linux/kernel/git/mel...David S. Miller2-1/+2
2021-12-15net/mlx5: Introduce log_max_current_uc_list_wr_supported bitShay Drory1-1/+1
2021-12-13net/mlx5: Separate FDB namespaceMaor Gottlieb1-0/+1
2021-12-02net/mlx5: Dynamically resize flow counters query bufferAvihai Horon1-0/+4
2021-11-30net/mlx5: Fix access to a non-supported registerAya Levin1-1/+4
2021-11-16net/mlx5: E-Switch, Fix resetting of encap mode when entering switchdevPaul Blakey1-2/+2
2021-10-29net/mlx5: Allow skipping counter refresh on creationPaul Blakey1-0/+4
2021-10-27Merge branch 'mlx5-next' of git://git.kernel.org/pub/scm/linux/kernel/git/mel...Saeed Mahameed4-31/+31
2021-10-26net/mlx5e: Add handle SHAMPO cqe supportKhalid Manaa1-5/+18
2021-10-26net/mlx5e: Add support to klm_umr_wqeBen Ben-Ishay1-0/+1
2021-10-26net/mlx5e: Rename TIR lro functions to TIR packet merge functionsKhalid Manaa1-1/+1
2021-10-26net/mlx5: Add SHAMPO caps, HW bits and enumerationsBen Ben-Ishay2-3/+57
2021-10-26net/mlx5e: Rename lro_timeout to packet_merge_timeoutBen Ben-Ishay1-3/+3
2021-10-26net/mlx5: remove the recent devlink paramsJakub Kicinski3-1/+6
2021-10-25net/mlx5: Let user configure max_macs paramShay Drory1-1/+1
2021-10-25net/mlx5: Let user configure event_eq_size paramShay Drory1-1/+0
2021-10-25net/mlx5: Let user configure io_eq_size paramShay Drory1-4/+0
2021-10-25net/mlx5: Add periodic update of host time to firmwareAya Levin2-0/+14
2021-10-25net/mlx5: Extend health buffer dumpAya Levin2-8/+16
2021-10-22Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netDavid S. Miller1-1/+0
2021-10-21Merge brank 'mlx5_mkey' into rdma.git for-nextLeon Romanovsky2-26/+14
2021-10-20net/mlx5: Lag, change multipath and bonding to be mutually exclusiveMaor Dickman1-1/+0
2021-10-19RDMA/mlx5: Move struct mlx5_core_mkey to mlx5_ibAharon Landau1-13/+0
2021-10-19RDMA/mlx5: Replace struct mlx5_core_mkey by u32 keyAharon Landau1-8/+6
2021-10-19RDMA/mlx5: Remove pd from struct mlx5_core_mkeyAharon Landau1-1/+0
2021-10-19RDMA/mlx5: Remove size from struct mlx5_core_mkeyAharon Landau1-1/+0
2021-10-19RDMA/mlx5: Remove iova from struct mlx5_core_mkeyAharon Landau1-1/+0
2021-10-18net/mlx5: Introduce new uplink destination typeMaor Gottlieb1-0/+1
2021-10-18net/mlx5: Add support to create match definerMaor Gottlieb2-27/+253
2021-10-18net/mlx5: Introduce port selection namespaceMaor Gottlieb3-2/+39
2021-10-15net/mlx5: Use native_port_num as 1st option of device indexRongwei Liu1-1/+6
2021-10-15net/mlx5: Introduce new device index wrapperRongwei Liu1-0/+5
2021-10-15net/mlx5: Disable roce at HCA levelShay Drory2-5/+7
2021-10-15net/mlx5: Read timeout values from init segmentAmir Tzin1-4/+1
2021-10-15net/mlx5: Add layout to support default timeouts registerAmir Tzin3-2/+40
2021-10-14Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netJakub Kicinski1-2/+8
2021-10-12net/mlx5e: Mutually exclude RX-FCS and RX-port-timestampAya Levin1-2/+8
2021-10-09net/mlx5: Add priorities for counters in RDMA namespacesAharon Landau2-0/+4
2021-10-09net/mlx5: Add ifc bits to support optional countersAharon Landau1-3/+19
2021-10-04net/mlx5: Enable single IRQ for PCI FunctionShay Drory1-1/+0
2021-10-04net/mlx5: Shift control IRQ to the last indexShay Drory1-0/+2
2021-10-04net/mlx5: Bridge, mark reg_c1 when pushing VLANVlad Buslov1-0/+9
2021-09-28IB/mlx5: Enable UAR to have DevX UIDMeir Lichtinger1-2/+0
2021-09-28net/mlx5: Add uid field to UAR allocation structuresMeir Lichtinger1-2/+2
2021-08-19net/mlx5: E-switch, Introduce rate limiting groups APIDmytro Linkin1-1/+2