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path: root/drivers/gpu/drm/i915/gvt/display.c
AgeCommit message (Expand)AuthorFilesLines
2024-10-22drm/i915/gvt: use macros from drm_dp.h instead of duplicationJani Nikula1-1/+3
2024-06-07drm/i915: pass dev_priv explicitly to TRANS_DDI_FUNC_CTLJani Nikula1-11/+14
2024-06-07drm/i915: pass dev_priv explicitly to PIPE_LINK_N1Jani Nikula1-2/+2
2024-06-07drm/i915: pass dev_priv explicitly to PIPE_LINK_M1Jani Nikula1-2/+2
2024-06-07drm/i915: pass dev_priv explicitly to PIPE_DATA_N1Jani Nikula1-2/+2
2024-06-07drm/i915: pass dev_priv explicitly to PIPE_DATA_M1Jani Nikula1-4/+4
2024-06-07drm/i915: pass dev_priv explicitly to PIPE_FRMCOUNT_G4XJani Nikula1-1/+1
2024-06-07drm/i915: pass dev_priv explicitly to TRANSCONFJani Nikula1-6/+6
2024-05-24drm/i915: pass dev_priv explicitly to DSPCNTRJani Nikula1-2/+2
2024-05-22drm/i915: Extract i9xx_plane_regs.hVille Syrjälä1-0/+1
2024-05-16drm/i915: pass dev_priv explicitly to CURCNTRJani Nikula1-4/+4
2024-05-15drm/i915: Extract intel_cursor_regs.hVille Syrjälä1-0/+1
2024-04-29drm/i915/display: split out intel_sprite_regs.h from i915_reg.hJani Nikula1-0/+1
2024-04-19drm/i915/dpio: Extract bxt_dpio_phy_regs.hVille Syrjälä1-0/+1
2023-02-17drm/i915: s/PIPECONF/TRANSCONF/Ville Syrjälä1-8/+8
2023-01-25drm/i915/display: add intel_display_limits.h for key enumsJani Nikula1-0/+1
2022-11-03drm/i915/dpio: move dpio_channel and dpio_phy enums to intel_dpio_phy.hJani Nikula1-0/+2
2022-02-02drm/i915: Only include i915_reg.h from .c filesMatt Roper1-0/+1
2022-01-28drm/i915: Clean up M/N register definesVille Syrjälä1-2/+2
2022-01-26drm/i915: Clean up PIPECONF bit definesVille Syrjälä1-2/+2
2022-01-24drm/i915: Clean up pre-skl primary plane registersVille Syrjälä1-2/+2
2022-01-18drm/i915: Clean up cursor registersVille Syrjälä1-2/+2
2021-03-16Merge tag 'gvt-next-2021-03-16' of https://github.com/intel/gvt-linux into dr...Jani Nikula1-48/+59
2021-03-01drm/i915/gvt: Refactor GVT vblank emulator for vGPU virtual displayColin Xu1-48/+57
2021-03-01drm/i915/gvt: Get accurate vGPU virtual display refresh rate from vregColin Xu1-0/+2
2021-01-06drm/i915/gvt: Fix vfio_edid issue for BXT/APLColin Xu1-24/+57
2020-12-14Merge tag 'drm-next-2020-12-11' of git://anongit.freedesktop.org/drm/drmLinus Torvalds1-7/+187
2020-11-12drm/i915/gvt: Set ENHANCED_FRAME_CAP bitTina Zhang1-1/+1
2020-11-10drm/i915/gvt: Fix virtual display setup for BXT/APLColin Xu1-0/+179
2020-10-30drm/i915: Introduce GEN8_DE_PORT_HOTPLUG()Ville Syrjälä1-7/+7
2020-10-30drm/i915: Parametrize BXT_DE_PORT_HP_DDI with hpd_pinVille Syrjälä1-6/+7
2020-06-25Merge drm/drm-next into drm-intel-next-queuedJani Nikula1-5/+44
2020-06-02drm/i915: Identify Cometlake platformChris Wilson1-10/+20
2020-05-09drm/i915/gvt: Init DPLL/DDI vreg for virtual display instead of inheritance.Colin Xu1-5/+44
2020-03-17drm/i915/gvt: Fix display port type issueTina Zhang1-3/+3
2020-03-06drm/i915/gvt: Wean gvt off using dev_privChris Wilson1-11/+11
2020-03-06drm/i915/gvt: Fix dma-buf display blur issue on CFLTina Zhang1-1/+2
2020-02-24drm/i915/gvt: Make WARN* drm specific where vgpu ptr is availablePankaj Bharadiya1-1/+2
2020-02-24drm/i915/gvt: Make WARN* drm specific where drm_priv ptr is availablePankaj Bharadiya1-1/+2
2019-04-24Merge tag 'drm-intel-next-2019-04-17' of git://anongit.freedesktop.org/drm/dr...Dave Airlie1-1/+0
2019-04-04drm/i915/gvt: Fix kerneldoc typo for intel_vgpu_emulate_hotplugChris Wilson1-1/+1
2019-03-29drm/i915/gvt: Enable async flip on plane surface mmio writesColin Xu1-1/+0
2019-01-31drm/i915/gvt: add hotplug emulationHang Yuan1-0/+30
2019-01-31drm/i915/gvt: add functions to get default resolutionHang Yuan1-0/+1
2019-01-10drm/i915/gvt: Enable gfx virtualiztion for CFLfred gao1-4/+8
2018-09-11Merge tag 'drm-intel-next-2018-09-06-2' of git://anongit.freedesktop.org/drm/...Dave Airlie1-0/+1
2018-08-07drm/i915/gvt: Fix function comment doc errorsZhenyu Wang1-0/+1
2018-07-30BackMerge v4.18-rc7 into drm-nextDave Airlie1-3/+3
2018-07-02drm/i915/gvt: changed DDI mode emulation typeXiaolin Zhang1-3/+3
2018-06-13drm/i915/gvt: Enable virtual display support for BXT.Colin Xu1-0/+23
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