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path: root/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
AgeCommit message (Expand)AuthorFilesLines
2024-10-22drm/amdgpu: Clean the functions pointer set as NULLSunil Khatri1-1/+0
2024-10-07drm/amdgpu: update the handle ptr in hw_finiSunil Khatri1-7/+3
2024-10-07drm/amdgpu: update the handle ptr in hw_initSunil Khatri1-7/+3
2024-10-07drm/amdgpu: update the handle ptr in resumeSunil Khatri1-2/+2
2024-10-07drm/amdgpu: update the handle ptr in suspendSunil Khatri1-2/+2
2024-10-07drm/amdgpu: update the handle ptr in wait_for_idleSunil Khatri1-1/+1
2024-10-01drm/amdgpu: update the handle ptr in soft_resetSunil Khatri1-1/+1
2024-10-01drm/amdgpu: update the handle ptr in sw_finiSunil Khatri1-2/+2
2024-10-01drm/amdgpu: update the handle ptr in sw_initSunil Khatri1-2/+2
2024-10-01drm/amdgpu: update the handle ptr in early_initSunil Khatri1-2/+2
2024-01-31drm/amdgpu: Reset IH OVERFLOW_CLEAR bitFriedrich Vock1-0/+6
2023-07-12drm/amdgpu: Increase soft IH ring sizePhilip Yang1-2/+2
2022-09-14drm/amdgpu: move nbio ih_doorbell_range() into ih code for vegaAlex Deucher1-0/+4
2022-08-16drm/amdgpu: Fix interrupt handling on ih_soft ringMukul Joshi1-1/+6
2022-05-05drm/amdgpu: simplify the return expression of vega10_ih_hw_init()Minghao Chi1-6/+1
2021-12-01drm/amdgpu: handle IH ring1 overflowPhilip Yang1-0/+1
2021-05-22Merge drm/drm-next into drm-misc-nextThomas Zimmermann1-0/+1
2021-05-19drm/amdgpu: Handle IOMMU enabled case.Andrey Grodzovsky1-4/+0
2021-05-19drm/amdgpu: Split amdgpu_device_fini into early and lateAndrey Grodzovsky1-1/+1
2021-04-20drm/amdgpu: enable 48-bit IH timestamp counterAlex Sierra1-0/+1
2021-03-23drm/amdgpu: enable retry fault wptr overflowPhilip Yang1-21/+11
2020-12-23drm/amdgpu: de-initialize software ih ringHawking Zhang1-0/+1
2020-12-23drm/amdgpu: set ih soft ring enabled flag for vega and naviHawking Zhang1-0/+3
2020-12-23drm/amdgpu: don't create ih ring 1 and ring 2 for APUHawking Zhang1-11/+12
2020-12-23drm/amdgpu: drop IH_CHICKEN programming from vega10 ih blockHawking Zhang1-3/+1
2020-12-23drm/amdgpu: correct ih_chicken programming for vega10/vega20 ih blocksHawking Zhang1-3/+0
2020-12-23drm/amdgpu: switch to common decode iv helperHawking Zhang1-46/+1
2020-12-23drm/amdgpu: correct ih cg programming for vega10 ih blockHawking Zhang1-6/+2
2020-12-23drm/amdgpu: use cached ih rb control reg offsets for vega10Hawking Zhang1-40/+14
2020-12-23drm/amdgpu: switch to ih_enable_ring for vega10Hawking Zhang1-87/+8
2020-12-23drm/amdgpu: switch to ih_toggle_interrupts for vega10Hawking Zhang1-134/+34
2020-12-23drm/amdgpu: switch to ih_init_register_offset for vega10Hawking Zhang1-0/+3
2020-12-23drm/amdgpu: add helper to toggle ih ring interrupts for vega10Hawking Zhang1-0/+45
2020-12-23drm/amdgpu: add helper to enable an ih ring for vega10Hawking Zhang1-0/+52
2020-12-23drm/amdgpu: add helper to init ih ring regs for vega10Hawking Zhang1-0/+47
2020-12-01drm/amd/amdgpu/vega10_ih: Add descriptions for 'ih' and 'entry'Lee Jones1-0/+5
2020-11-24drm/amdgpu: enabled software IH ring for VegaChristian König1-0/+7
2020-01-22drm/amdgpu: remove unnecessary conversion to boolNirmoy Das1-1/+1
2020-01-07drm/amd/amdgpu: L1 Policy(5/5) - removed IH_CHICKEN from VFZhigang Luo1-10/+12
2019-10-03drm/amd/amdgpu: add IH cg support on soc15 projectKenneth Feng1-0/+39
2019-09-13drm/amdgpu: switch to new amdgpu_nbio structureHawking Zhang1-1/+1
2019-08-30drm/amdgpu: fix no interrupt issue for renoir emu (v2)Aaron Liu1-8/+10
2019-08-12drm/amdgpu: fix no interrupt issue for renoir emuAaron Liu1-1/+1
2019-08-02drm/amdgpu: cleanup vega10 SRIOV code pathMonk Liu1-9/+9
2019-07-18drm/amdgpu: correct programming of ih_chicken for ArcturusLe Ma1-1/+10
2019-06-14Merge tag 'drm-misc-next-2019-06-14' of git://anongit.freedesktop.org/drm/drm...Daniel Vetter1-1/+3
2019-06-10drm/amd: drop use of drmP.h in remaining filesSam Ravnborg1-1/+3
2019-05-24drm/amdgpu: call psp to program ih cntl in SR-IOVTrigger Huang1-9/+82
2019-05-06drm/amdgpu: Rearm IRQ in Vega10 SR-IOV if IRQ lostTrigger Huang1-1/+36
2019-03-19drm/amdgpu: enable IH ring 1&2 for Vega20 as wellChristian König1-17/+13
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