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path: root/drivers/cxl/Makefile
AgeCommit message (Expand)AuthorFilesLines
2024-10-25cxl/port: Fix CXL port initialization order when the subsystem is built-inDan Williams1-6/+14
2022-11-30cxl/pmem: Introduce nvdimm_security_ops with ->get_flags() operationDave Jiang1-1/+1
2022-04-22PM: CXL: Disable suspendDan Williams1-1/+1
2022-02-08cxl/mem: Add the cxl_mem driverBen Widawsky1-0/+2
2022-02-08cxl/port: Add a driver for 'struct cxl_port' objectsBen Widawsky1-0/+2
2022-02-08cxl: Rename CXL_MEM to CXL_PCIBen Widawsky1-1/+1
2021-08-06cxl: Move cxl_core to new directoryBen Widawsky1-3/+1
2021-06-15cxl/pmem: Add initial infrastructure for pmem supportDan Williams1-0/+2
2021-06-09cxl/acpi: Introduce the root of a cxl_port topologyDan Williams1-0/+2
2021-05-26cxl: Rename mem to pciBen Widawsky1-2/+2
2021-05-14cxl/core: Rename bus.c to core.cDan Williams1-2/+2
2021-02-16cxl/mem: Register CXL memX devicesDan Williams1-0/+3
2021-02-16cxl/mem: Introduce a driver for CXL-2.0-Type-3 endpointsDan Williams1-0/+4