| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2015-07-17 | Update Viresh Kumar's email address | Viresh Kumar | 1 | -1/+1 |
| 2012-11-21 | CLK: SPEAr: Set CLK_SET_RATE_PARENT for few clocks | Vipul Kumar Samar | 1 | -1/+2 |
| 2012-06-20 | Viresh has moved | Viresh Kumar | 1 | -1/+1 |
| 2012-05-12 | SPEAr: clk: Add Auxiliary Synthesizer clock | Viresh Kumar | 1 | -0/+198 |
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index : drm-misc | |
| Kernel DRM miscellaneous fixes and cross-tree changes | UNKNOWN |
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