drm-misc - Kernel DRM miscellaneous fixes and cross-tree changes

Age	Commit message (Expand)	Author	Files	Lines
2020-05-21	clk: imx: use imx8m_clk_hw_composite_bus for i.MX8M bus clk slice	Peng Fan	4	-39/+39
2020-05-21	clk: imx: add imx8m_clk_hw_composite_bus	Peng Fan	2	-0/+12
2020-05-21	clk: imx: add mux ops for i.MX8M composite clk	Peng Fan	1	-1/+50
2020-05-20	clk: imx8m: migrate A53 clk root to use composite core	Peng Fan	3	-9/+9
2020-05-20	clk: imx8mp: use imx8m_clk_hw_composite_core to simplify code	Peng Fan	1	-31/+16
2020-05-20	clk: imx8mp: Define gates for pll1/2 fixed dividers	Peng Fan	1	-18/+36
2020-05-20	clk: imx: imx8mp: fix pll mux bit	Peng Fan	1	-10/+10
2020-05-20	clk: imx8m: drop clk_hw_set_parent for A53	Peng Fan	4	-12/+0
2020-04-29	clk: imx: Add helpers for passing the device as argument	Abel Vesa	1	-0/+29
2020-04-29	clk: imx: pll14xx: Add the device as argument when registering	Abel Vesa	2	-7/+14
2020-04-29	clk: imx: gate2: Allow single bit gating clock	Abel Vesa	2	-8/+36
2020-04-20	clk: imx: clk-pllv3: Use readl_relaxed_poll_timeout() for PLL lock wait	Anson Huang	1	-11/+5
2020-04-20	clk: imx: clk-sscg-pll: Remove unnecessary blank lines	Anson Huang	1	-10/+0
2020-04-14	clk: imx: drop the dependency on ARM64 for i.MX8M	Peng Fan	1	-4/+4
2020-04-14	clk: imx7ulp: make it easy to change ARM core clk	Peng Fan	1	-2/+4
2020-04-13	clk: imx: imx6ul: change flexcan clock to support CiA bitrates	Waibel Georg	1	-1/+1
2020-04-05	Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...	Linus Torvalds	16	-110/+210
2020-04-03	Merge tag 'arm-dt-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc	Linus Torvalds	1	-0/+1
2020-03-25	clk: imx: Align imx sc clock parent msg structs to 4	Leonard Crestez	1	-1/+1
2020-03-25	clk: imx: Align imx sc clock msg structs to 4	Leonard Crestez	1	-3/+3
2020-03-16	clk: imx: clk-gate2: Pass the device to the register function	Abel Vesa	1	-1/+1
2020-03-16	clk: imx7d: Add PXP clock	Laurent Pinchart	1	-0/+1
2020-03-16	clk: imx8mp: Correct the enet_qos parent clock	Fugang Duan	1	-1/+1
2020-03-16	clk: imx8mp: Correct IMX8MP_CLK_HDMI_AXI clock parent	Anson Huang	1	-1/+1
2020-03-11	clk: imx8mq: A53 core clock no need to be critical	Anson Huang	1	-4/+4
2020-03-11	clk: imx8mp: A53 core clock no need to be critical	Anson Huang	1	-4/+4
2020-03-11	clk: imx8mm: A53 core clock no need to be critical	Anson Huang	1	-4/+4
2020-03-11	clk: imx8mn: A53 core clock no need to be critical	Anson Huang	1	-4/+4
2020-03-10	clk: imx: pllv4: use prepare/unprepare	Peng Fan	1	-6/+6
2020-03-10	clk: imx: pfdv2: determine best parent rate	Peng Fan	1	-17/+33
2020-03-10	clk: imx: pfdv2: switch to use determine_rate	Peng Fan	1	-6/+9
2020-03-10	clk: imx: Fix division by zero warning on pfdv2	Anson Huang	1	-0/+6
2020-02-24	clk: imx: clk-sscg-pll: Drop unnecessary initialization	Anson Huang	1	-7/+7
2020-02-24	clk: imx: pll14xx: Return error if pll type is invalid	Anson Huang	1	-0/+2
2020-02-24	clk: imx: imx8mp: fix a53 cpu clock	Peng Fan	1	-4/+12
2020-02-24	clk: imx: imx8mn: fix a53 cpu clock	Peng Fan	1	-4/+12
2020-02-24	clk: imx: imx8mm: fix a53 cpu clock	Peng Fan	1	-4/+12
2020-02-24	clk: imx: imx8mq: fix a53 cpu clock	Peng Fan	1	-4/+12
2020-02-24	clk: imx8mp: Rename the IMX8MP_CLK_HDMI_27M clock	Anson Huang	1	-2/+2
2020-02-19	clk: imx8mn: Remove unused includes	Anson Huang	1	-2/+0
2020-02-19	clk: imx8mm: Remove unused includes	Anson Huang	1	-2/+0
2020-02-19	clk: imx8mp: Include slab.h instead of clkdev.h	Anson Huang	1	-1/+1
2020-02-17	clk: imx8mp: Add missing of_node_put()	Anson Huang	1	-0/+1
2020-02-17	clk: imx8mn: Add missing of_node_put()	Anson Huang	1	-0/+1
2020-02-17	clk: imx8mm: Add missing of_node_put()	Anson Huang	1	-0/+1
2020-02-17	clk: imx8mq: Add missing of_node_put()	Anson Huang	1	-0/+1
2020-02-17	clk: imx6sl: Add missing of_node_put()	Anson Huang	1	-0/+1
2020-02-17	clk: imx7ulp: Include clk-provider.h instead of clk.h	Anson Huang	1	-1/+1
2020-02-17	clk: imx: drop redundant initialization	Anson Huang	4	-6/+6
2020-02-17	clk: imx: Include clk-provider.h instead of clk.h for i.MX8M SoCs clock driver	Anson Huang	3	-3/+3