summaryrefslogtreecommitdiff
path: root/arch/arm64/mm/cache.S
AgeCommit message (Expand)AuthorFilesLines
2016-07-01arm64: fix "dc cvau" cache operation on errata-affected coreAndre Przywara1-1/+1
2016-04-28arm64: Fold proc-macros.S into assembler.hGeoff Levand1-2/+0
2015-12-17arm64: Use PoU cache instr for I/D coherencyAshok Kumar1-11/+17
2015-10-12arm64: use ENDPIPROC() to annotate position independent assembler routinesArd Biesheuvel1-5/+5
2015-07-27arm64: mm: Adopt new alternative assembler macrosDaniel Thompson1-1/+6
2015-06-05arm64: alternative: Merge alternative-asm.h into alternative.hMarc Zyngier1-1/+1
2015-05-19arm64: kill flush_cache_all()Mark Rutland1-73/+0
2014-12-01arm64: compat: align cacheflush syscall with arch/armVladimir Murzin1-1/+5
2014-11-25arm64: add Cortex-A53 cache errata workaroundAndre Przywara1-1/+3
2014-05-09arm64: mm: use inner-shareable barriers for inner-shareable maintenanceWill Deacon1-3/+3
2014-04-08arm64: Fix DMA range invalidation for cache line unaligned buffersCatalin Marinas1-4/+11
2014-04-05arm64: Relax the kernel cache requirements for bootCatalin Marinas1-0/+9
2014-03-04arm64: remove unnecessary cache flush at bootMark Rutland1-1/+1
2014-02-27arm64: Implement coherent DMA API based on swiotlbCatalin Marinas1-0/+78
2014-01-22arm64: mm: fix the function name in comment of __flush_dcache_areaJingoo Han1-1/+1
2013-05-14arm64: mm: Fix operands of clz in __flush_dcache_allSukanto Ghosh1-1/+1
2012-09-17arm64: Cache maintenance routinesCatalin Marinas1-0/+168
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-12 20:52:00 +0000