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path: root/drivers/gpu/drm/stm/ltdc.h
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Diffstat (limited to 'drivers/gpu/drm/stm/ltdc.h')
-rw-r--r--drivers/gpu/drm/stm/ltdc.h15
1 files changed, 13 insertions, 2 deletions
diff --git a/drivers/gpu/drm/stm/ltdc.h b/drivers/gpu/drm/stm/ltdc.h
index f153b908c70e..59fc5d1bbbab 100644
--- a/drivers/gpu/drm/stm/ltdc.h
+++ b/drivers/gpu/drm/stm/ltdc.h
@@ -14,12 +14,20 @@
struct ltdc_caps {
u32 hw_version; /* hardware version */
u32 nb_layers; /* number of supported layers */
- u32 reg_ofs; /* register offset for applicable regs */
+ u32 layer_ofs; /* layer offset for applicable regs */
+ const u32 *layer_regs; /* layer register offset */
u32 bus_width; /* bus width (32 or 64 bits) */
- const u32 *pix_fmt_hw; /* supported pixel formats */
+ const u32 *pix_fmt_hw; /* supported hw pixel formats */
+ const u32 *pix_fmt_drm; /* supported drm pixel formats */
+ int pix_fmt_nb; /* number of pixel format */
+ bool pix_fmt_flex; /* pixel format flexibility supported */
bool non_alpha_only_l1; /* non-native no-alpha formats on layer 1 */
int pad_max_freq_hz; /* max frequency supported by pad */
int nb_irq; /* number of hardware interrupts */
+ bool ycbcr_input; /* ycbcr input converter supported */
+ bool ycbcr_output; /* ycbcr output converter supported */
+ bool plane_reg_shadow; /* plane shadow registers ability */
+ bool crc; /* cyclic redundancy check supported */
};
#define LTDC_MAX_LAYER 4
@@ -31,6 +39,7 @@ struct fps_info {
struct ltdc_device {
void __iomem *regs;
+ struct regmap *regmap;
struct clk *pixel_clk; /* lcd pixel clock */
struct mutex err_lock; /* protecting error_status */
struct ltdc_caps caps;
@@ -38,6 +47,8 @@ struct ltdc_device {
u32 irq_status;
struct fps_info plane_fpsi[LTDC_MAX_LAYER];
struct drm_atomic_state *suspend_state;
+ int crc_skip_count;
+ bool crc_active;
};
int ltdc_load(struct drm_device *ddev);