summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/i915/i915_pci.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/gpu/drm/i915/i915_pci.c')
-rw-r--r--drivers/gpu/drm/i915/i915_pci.c87
1 files changed, 57 insertions, 30 deletions
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index f940e486a62a..506ec32b9e53 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -312,16 +312,17 @@ static const struct intel_device_info intel_haswell_info = {
.has_full_48bit_ppgtt = 1, \
.has_64bit_reloc = 1
+#define BDW_PLATFORM \
+ BDW_FEATURES, \
+ .gen = 8, \
+ .platform = INTEL_BROADWELL
+
static const struct intel_device_info intel_broadwell_info = {
- BDW_FEATURES,
- .gen = 8,
- .platform = INTEL_BROADWELL,
+ BDW_PLATFORM,
};
static const struct intel_device_info intel_broadwell_gt3_info = {
- BDW_FEATURES,
- .gen = 8,
- .platform = INTEL_BROADWELL,
+ BDW_PLATFORM,
.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
};
@@ -347,22 +348,20 @@ static const struct intel_device_info intel_cherryview_info = {
CHV_COLORS,
};
+#define SKL_PLATFORM \
+ BDW_FEATURES, \
+ .gen = 9, \
+ .platform = INTEL_SKYLAKE, \
+ .has_csr = 1, \
+ .has_guc = 1, \
+ .ddb_size = 896
+
static const struct intel_device_info intel_skylake_info = {
- BDW_FEATURES,
- .platform = INTEL_SKYLAKE,
- .gen = 9,
- .has_csr = 1,
- .has_guc = 1,
- .ddb_size = 896,
+ SKL_PLATFORM,
};
static const struct intel_device_info intel_skylake_gt3_info = {
- BDW_FEATURES,
- .platform = INTEL_SKYLAKE,
- .gen = 9,
- .has_csr = 1,
- .has_guc = 1,
- .ddb_size = 896,
+ SKL_PLATFORM,
.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
};
@@ -401,28 +400,52 @@ static const struct intel_device_info intel_broxton_info = {
static const struct intel_device_info intel_geminilake_info = {
GEN9_LP_FEATURES,
.platform = INTEL_GEMINILAKE,
- .is_alpha_support = 1,
.ddb_size = 1024,
.color = { .degamma_lut_size = 0, .gamma_lut_size = 1024 }
};
+#define KBL_PLATFORM \
+ BDW_FEATURES, \
+ .gen = 9, \
+ .platform = INTEL_KABYLAKE, \
+ .has_csr = 1, \
+ .has_guc = 1, \
+ .ddb_size = 896
+
static const struct intel_device_info intel_kabylake_info = {
- BDW_FEATURES,
- .platform = INTEL_KABYLAKE,
- .gen = 9,
- .has_csr = 1,
- .has_guc = 1,
- .ddb_size = 896,
+ KBL_PLATFORM,
};
static const struct intel_device_info intel_kabylake_gt3_info = {
+ KBL_PLATFORM,
+ .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
+};
+
+#define CFL_PLATFORM \
+ .is_alpha_support = 1, \
+ BDW_FEATURES, \
+ .gen = 9, \
+ .platform = INTEL_COFFEELAKE, \
+ .has_csr = 1, \
+ .has_guc = 1, \
+ .ddb_size = 896
+
+static const struct intel_device_info intel_coffeelake_info = {
+ CFL_PLATFORM,
+};
+
+static const struct intel_device_info intel_coffeelake_gt3_info = {
+ CFL_PLATFORM,
+ .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
+};
+
+static const struct intel_device_info intel_cannonlake_info = {
BDW_FEATURES,
- .platform = INTEL_KABYLAKE,
- .gen = 9,
+ .is_alpha_support = 1,
+ .platform = INTEL_CANNONLAKE,
+ .gen = 10,
+ .ddb_size = 1024,
.has_csr = 1,
- .has_guc = 1,
- .ddb_size = 896,
- .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
};
/*
@@ -469,6 +492,10 @@ static const struct pci_device_id pciidlist[] = {
INTEL_KBL_GT2_IDS(&intel_kabylake_info),
INTEL_KBL_GT3_IDS(&intel_kabylake_gt3_info),
INTEL_KBL_GT4_IDS(&intel_kabylake_gt3_info),
+ INTEL_CFL_S_IDS(&intel_coffeelake_info),
+ INTEL_CFL_H_IDS(&intel_coffeelake_info),
+ INTEL_CFL_U_IDS(&intel_coffeelake_gt3_info),
+ INTEL_CNL_IDS(&intel_cannonlake_info),
{0, 0, 0}
};
MODULE_DEVICE_TABLE(pci, pciidlist);