diff options
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h b/drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h index 52f045cfd52a..84c8f8707c5d 100644 --- a/drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h +++ b/drivers/gpu/drm/amd/display/dc/hwss/dce/dce_hwseq.h @@ -684,6 +684,14 @@ struct dce_hwseq_registers { uint32_t DMU_CLK_CNTL; uint32_t DCCG_GATE_DISABLE_CNTL4; uint32_t DCCG_GATE_DISABLE_CNTL5; + uint32_t DOMAIN22_PG_CONFIG; + uint32_t DOMAIN23_PG_CONFIG; + uint32_t DOMAIN24_PG_CONFIG; + uint32_t DOMAIN25_PG_CONFIG; + uint32_t DOMAIN22_PG_STATUS; + uint32_t DOMAIN23_PG_STATUS; + uint32_t DOMAIN24_PG_STATUS; + uint32_t DOMAIN25_PG_STATUS; }; /* set field name */ #define HWS_SF(blk_name, reg_name, field_name, post_fix)\ @@ -1214,6 +1222,20 @@ struct dce_hwseq_registers { type DPIASYMCLK2_GATE_DISABLE;\ type DPIASYMCLK3_GATE_DISABLE; +#define HWSEQ_DCN401_REG_FIELD_LIST(type) \ + type DOMAIN22_POWER_FORCEON; \ + type DOMAIN22_POWER_GATE; \ + type DOMAIN23_POWER_FORCEON; \ + type DOMAIN23_POWER_GATE; \ + type DOMAIN24_POWER_FORCEON; \ + type DOMAIN24_POWER_GATE; \ + type DOMAIN25_POWER_FORCEON; \ + type DOMAIN25_POWER_GATE; \ + type DOMAIN22_PGFSM_PWR_STATUS; \ + type DOMAIN23_PGFSM_PWR_STATUS; \ + type DOMAIN24_PGFSM_PWR_STATUS; \ + type DOMAIN25_PGFSM_PWR_STATUS; \ + type DOMAIN_DESIRED_PWR_STATE; struct dce_hwseq_shift { HWSEQ_REG_FIELD_LIST(uint8_t) HWSEQ_DCN_REG_FIELD_LIST(uint8_t) @@ -1221,6 +1243,7 @@ struct dce_hwseq_shift { HWSEQ_DCN301_REG_FIELD_LIST(uint8_t) HWSEQ_DCN31_REG_FIELD_LIST(uint8_t) HWSEQ_DCN35_REG_FIELD_LIST(uint8_t) + HWSEQ_DCN401_REG_FIELD_LIST(uint8_t) }; struct dce_hwseq_mask { @@ -1230,6 +1253,7 @@ struct dce_hwseq_mask { HWSEQ_DCN301_REG_FIELD_LIST(uint32_t) HWSEQ_DCN31_REG_FIELD_LIST(uint32_t) HWSEQ_DCN35_REG_FIELD_LIST(uint32_t) + HWSEQ_DCN401_REG_FIELD_LIST(uint32_t) }; |