diff options
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c | 61 |
1 files changed, 56 insertions, 5 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c b/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c index 9412d5384a41..d5dcc8b77281 100644 --- a/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c +++ b/drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c @@ -31,6 +31,7 @@ #include "dml2_translation_helper.h" #include "dml2_mall_phantom.h" #include "dml2_dc_resource_mgmt.h" +#include "dml21_wrapper.h" static void initialize_dml2_ip_params(struct dml2_context *dml2, const struct dc *in_dc, struct ip_params_st *out) @@ -441,7 +442,6 @@ static bool optimize_pstate_with_svp_and_drr(struct dml2_context *dml2, struct d bool result = false; int drr_display_index = 0, non_svp_streams = 0; bool force_svp = dml2->config.svp_pstate.force_enable_subvp; - bool advanced_pstate_switching = false; display_state->bw_ctx.bw.dcn.clk.fw_based_mclk_switching = false; display_state->bw_ctx.bw.dcn.legacy_svp_drr_stream_index_valid = false; @@ -450,8 +450,7 @@ static bool optimize_pstate_with_svp_and_drr(struct dml2_context *dml2, struct d if (!result) { pstate_optimization_done = true; - } else if (!advanced_pstate_switching || - (s->mode_support_info.DRAMClockChangeSupport[0] != dml_dram_clock_change_unsupported && !force_svp)) { + } else if (s->mode_support_info.DRAMClockChangeSupport[0] != dml_dram_clock_change_unsupported && !force_svp) { pstate_optimization_success = true; pstate_optimization_done = true; } @@ -572,8 +571,21 @@ static bool dml2_validate_and_build_resource(const struct dc *in_dc, struct dc_s bool need_recalculation = false; uint32_t cstate_enter_plus_exit_z8_ns; - if (!context || context->stream_count == 0) + if (context->stream_count == 0) { + unsigned int lowest_state_idx = 0; + + out_clks.p_state_supported = true; + out_clks.dispclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].dispclk_mhz * 1000; + out_clks.dcfclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].dcfclk_mhz * 1000; + out_clks.fclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].fabricclk_mhz * 1000; + out_clks.uclk_mts = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].dram_speed_mts; + out_clks.phyclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].phyclk_mhz * 1000; + out_clks.socclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].socclk_mhz * 1000; + out_clks.ref_dtbclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].dtbclk_mhz * 1000; + context->bw_ctx.bw.dcn.clk.dtbclk_en = false; + dml2_copy_clocks_to_dc_state(&out_clks, context); return true; + } /* Zero out before each call before proceeding */ memset(&dml2->v20.scratch, 0, sizeof(struct dml2_wrapper_scratch)); @@ -658,12 +670,14 @@ static bool dml2_validate_and_build_resource(const struct dc *in_dc, struct dc_s static bool dml2_validate_only(struct dc_state *context) { - struct dml2_context *dml2 = context->bw_ctx.dml2; + struct dml2_context *dml2; unsigned int result = 0; if (!context || context->stream_count == 0) return true; + dml2 = context->bw_ctx.dml2; + /* Zero out before each call before proceeding */ memset(&dml2->v20.scratch, 0, sizeof(struct dml2_wrapper_scratch)); memset(&dml2->v20.dml_core_ctx.policy, 0, sizeof(struct dml_mode_eval_policy_st)); @@ -699,6 +713,11 @@ bool dml2_validate(const struct dc *in_dc, struct dc_state *context, struct dml2 return false; dml2_apply_debug_options(in_dc, dml2); + /* DML2.1 validation path */ + if (dml2->architecture == dml2_architecture_21) { + out = dml21_validate(in_dc, context, dml2, fast_validate); + return out; + } /* Use dml_validate_only for fast_validate path */ if (fast_validate) @@ -715,6 +734,11 @@ static inline struct dml2_context *dml2_allocate_memory(void) static void dml2_init(const struct dc *in_dc, const struct dml2_configuration_options *config, struct dml2_context **dml2) { + // TODO : Temporarily add DCN_VERSION_3_2 for N-1 validation. Remove DCN_VERSION_3_2 after N-1 validation phase is complete. + if ((in_dc->debug.using_dml21) && (in_dc->ctx->dce_version == DCN_VERSION_4_01 || in_dc->ctx->dce_version == DCN_VERSION_3_2)) { + dml21_reinit(in_dc, dml2, config); + return; + } // Store config options (*dml2)->config = *config; @@ -732,6 +756,9 @@ static void dml2_init(const struct dc *in_dc, const struct dml2_configuration_op case DCN_VERSION_3_21: (*dml2)->v20.dml_core_ctx.project = dml_project_dcn321; break; + case DCN_VERSION_4_01: + (*dml2)->v20.dml_core_ctx.project = dml_project_dcn401; + break; default: (*dml2)->v20.dml_core_ctx.project = dml_project_default; break; @@ -746,6 +773,11 @@ static void dml2_init(const struct dc *in_dc, const struct dml2_configuration_op bool dml2_create(const struct dc *in_dc, const struct dml2_configuration_options *config, struct dml2_context **dml2) { + // TODO : Temporarily add DCN_VERSION_3_2 for N-1 validation. Remove DCN_VERSION_3_2 after N-1 validation phase is complete. + if ((in_dc->debug.using_dml21) && (in_dc->ctx->dce_version == DCN_VERSION_4_01 || in_dc->ctx->dce_version == DCN_VERSION_3_2)) { + return dml21_create(in_dc, dml2, config); + } + // Allocate Mode Lib Ctx *dml2 = dml2_allocate_memory(); @@ -762,6 +794,8 @@ void dml2_destroy(struct dml2_context *dml2) if (!dml2) return; + if (dml2->architecture == dml2_architecture_21) + dml21_destroy(dml2); kfree(dml2); } @@ -772,9 +806,19 @@ void dml2_extract_dram_and_fclk_change_support(struct dml2_context *dml2, *dram_clk_change_support = (unsigned int) dml2->v20.dml_core_ctx.ms.support.DRAMClockChangeSupport[0]; } +void dml2_prepare_mcache_programming(struct dc *in_dc, struct dc_state *context, struct dml2_context *dml2) +{ + if (dml2->architecture == dml2_architecture_21) + dml21_prepare_mcache_programming(in_dc, context, dml2); +} + void dml2_copy(struct dml2_context *dst_dml2, struct dml2_context *src_dml2) { + if (src_dml2->architecture == dml2_architecture_21) { + dml21_copy(dst_dml2, src_dml2); + return; + } /* copy Mode Lib Ctx */ memcpy(dst_dml2, src_dml2, sizeof(struct dml2_context)); } @@ -782,6 +826,8 @@ void dml2_copy(struct dml2_context *dst_dml2, bool dml2_create_copy(struct dml2_context **dst_dml2, struct dml2_context *src_dml2) { + if (src_dml2->architecture == dml2_architecture_21) + return dml21_create_copy(dst_dml2, src_dml2); /* Allocate Mode Lib Ctx */ *dst_dml2 = dml2_allocate_memory(); @@ -798,6 +844,11 @@ void dml2_reinit(const struct dc *in_dc, const struct dml2_configuration_options *config, struct dml2_context **dml2) { + // TODO : Temporarily add DCN_VERSION_3_2 for N-1 validation. Remove DCN_VERSION_3_2 after N-1 validation phase is complete. + if ((in_dc->debug.using_dml21) && (in_dc->ctx->dce_version == DCN_VERSION_4_01 || in_dc->ctx->dce_version == DCN_VERSION_3_2)) { + dml21_reinit(in_dc, dml2, config); + return; + } dml2_init(in_dc, config, dml2); } |