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authorThierry Reding <treding@nvidia.com>2021-06-02 18:32:52 +0200
committerKrzysztof Kozlowski <krzysztof.kozlowski@canonical.com>2021-06-03 21:49:40 +0200
commite899993845e60cc24d8e667a312eaa03a05d21ec (patch)
tree0f79a23893a68b28b62efc0ab1bd50fe5488b3a4 /include/soc
parent4f1ac76e5ed9436ff3cd72e308527fd1e90b193a (diff)
memory: tegra: Unify struct tegra_mc across SoC generations
As another step towards unifying both the Tegra210 (and earlier) and Tegra186 (and later) memory controller drivers, unify the structures that are used to represent them. Note that this comes at a slight space penalty since some fields are not used on all generations, but the benefits of unifying the driver outweigh the downsides. Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20210602163302.120041-3-thierry.reding@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Diffstat (limited to 'include/soc')
-rw-r--r--include/soc/tegra/mc.h18
1 files changed, 16 insertions, 2 deletions
diff --git a/include/soc/tegra/mc.h b/include/soc/tegra/mc.h
index dd26505464c2..9da4ef52ce30 100644
--- a/include/soc/tegra/mc.h
+++ b/include/soc/tegra/mc.h
@@ -26,12 +26,20 @@ struct tegra_mc_timing {
struct tegra_mc_client {
unsigned int id;
const char *name;
- unsigned int swgroup;
+ /*
+ * For Tegra210 and earlier, this is the SWGROUP ID used for IOVA translations in the
+ * Tegra SMMU, whereas on Tegra186 and later this is the ID used to override the ARM SMMU
+ * stream ID used for IOVA translations for the given memory client.
+ */
+ union {
+ unsigned int swgroup;
+ unsigned int sid;
+ };
unsigned int fifo_size;
struct {
- /* Tegra SMMU enable */
+ /* Tegra SMMU enable (Tegra210 and earlier) */
struct {
unsigned int reg;
unsigned int bit;
@@ -44,6 +52,12 @@ struct tegra_mc_client {
unsigned int mask;
unsigned int def;
} la;
+
+ /* stream ID overrides (Tegra186 and later) */
+ struct {
+ unsigned int override;
+ unsigned int security;
+ } sid;
} regs;
};