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authorJonas Gorski <jonas.gorski@gmail.com>2017-03-01 10:08:12 +0100
committerMark Brown <broonie@kernel.org>2017-03-13 15:51:10 +0000
commitff18e1ef04e2073889569b07a5ddd54a6527917f (patch)
treeb953274f65612dd956ffca587acdcbc64ad888bc /drivers
parentccd0657c33b2c3701c5b14725284b7e671d3fb93 (diff)
spi/bcm63xx-hsspi: allow providing clock rate through a second clock
The HSSPI block actually has two clock inputs, one for gating the block, and one for the PLL rate. To allow these to be represented as two clocks, add support for retrieving the rate from a separate "pll" clock, if the "hsspi" clock does not provide one. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/spi/spi-bcm63xx-hsspi.c12
1 files changed, 10 insertions, 2 deletions
diff --git a/drivers/spi/spi-bcm63xx-hsspi.c b/drivers/spi/spi-bcm63xx-hsspi.c
index 55789f7cda92..79096d17ebde 100644
--- a/drivers/spi/spi-bcm63xx-hsspi.c
+++ b/drivers/spi/spi-bcm63xx-hsspi.c
@@ -351,8 +351,16 @@ static int bcm63xx_hsspi_probe(struct platform_device *pdev)
return PTR_ERR(clk);
rate = clk_get_rate(clk);
- if (!rate)
- return -EINVAL;
+ if (!rate) {
+ struct clk *pll_clk = devm_clk_get(dev, "pll");
+
+ if (IS_ERR(pll_clk))
+ return PTR_ERR(pll_clk);
+
+ rate = clk_get_rate(pll_clk);
+ if (!rate)
+ return -EINVAL;
+ }
ret = clk_prepare_enable(clk);
if (ret)