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authorCrystal Guo <crystal.guo@mediatek.com>2020-10-14 21:19:36 +0800
committerWim Van Sebroeck <wim@linux-watchdog.org>2021-02-07 14:41:24 +0100
commitadc318a3406681758b9865558952fd92a42c2d6f (patch)
treef44011993ccae1a76c7dd6a39044c3d82ff371d1 /drivers/watchdog/mtk_wdt.c
parentaf2a30fb70017ef10a08e1547183627fb529a1fe (diff)
watchdog: mt8192: add wdt support
Add support for watchdog device found in MT8192 SoC Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Link: https://lore.kernel.org/r/20201014131936.20584-5-crystal.guo@mediatek.com Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
Diffstat (limited to 'drivers/watchdog/mtk_wdt.c')
-rw-r--r--drivers/watchdog/mtk_wdt.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/watchdog/mtk_wdt.c b/drivers/watchdog/mtk_wdt.c
index 0c869b770502..97ca993bd009 100644
--- a/drivers/watchdog/mtk_wdt.c
+++ b/drivers/watchdog/mtk_wdt.c
@@ -11,6 +11,7 @@
#include <dt-bindings/reset-controller/mt2712-resets.h>
#include <dt-bindings/reset-controller/mt8183-resets.h>
+#include <dt-bindings/reset-controller/mt8192-resets.h>
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/init.h>
@@ -76,6 +77,10 @@ static const struct mtk_wdt_data mt8183_data = {
.toprgu_sw_rst_num = MT8183_TOPRGU_SW_RST_NUM,
};
+static const struct mtk_wdt_data mt8192_data = {
+ .toprgu_sw_rst_num = MT8192_TOPRGU_SW_RST_NUM,
+};
+
static int toprgu_reset_update(struct reset_controller_dev *rcdev,
unsigned long id, bool assert)
{
@@ -335,6 +340,7 @@ static const struct of_device_id mtk_wdt_dt_ids[] = {
{ .compatible = "mediatek,mt2712-wdt", .data = &mt2712_data },
{ .compatible = "mediatek,mt6589-wdt" },
{ .compatible = "mediatek,mt8183-wdt", .data = &mt8183_data },
+ { .compatible = "mediatek,mt8192-wdt", .data = &mt8192_data },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, mtk_wdt_dt_ids);