diff options
| author | Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com> | 2016-04-06 12:06:52 +0800 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2016-04-30 09:26:55 -0700 |
| commit | c2684ed7d0e908e7c8dad7f199922d342ea55c66 (patch) | |
| tree | 995dc2978b1f4dc11e283ba9884a3d22e6589f1a /drivers/tty | |
| parent | 144ef5c2df9b473dad7eab375adcf5b11d0b1e47 (diff) | |
serial: 8250_pci: report DCD and DSR signals as active for Bay Trail
Bay Trail UART port does not support DCD and DSR lines. The driver
shall report that these signals are permanently active. This patch
is for HSUART enumerated via PCI.
For ACPI, see commit dfd37668ea6d ("serial: 8250_dw: Fix get_mctrl
behaviour"). The commit also describes the possible issue if these
signals are enabled on a port without these pins.
Signed-off-by: Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/tty')
| -rw-r--r-- | drivers/tty/serial/8250/8250_pci.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/tty/serial/8250/8250_pci.c b/drivers/tty/serial/8250/8250_pci.c index 4eedd1da32e6..0cf512377189 100644 --- a/drivers/tty/serial/8250/8250_pci.c +++ b/drivers/tty/serial/8250/8250_pci.c @@ -1416,6 +1416,17 @@ static bool byt_dma_filter(struct dma_chan *chan, void *param) return true; } +static unsigned int +byt_get_mctrl(struct uart_port *port) +{ + unsigned int ret = serial8250_do_get_mctrl(port); + + /* Force DCD and DSR signals to permanently be reported as active. */ + ret |= TIOCM_CAR | TIOCM_DSR; + + return ret; +} + static int byt_serial_setup(struct serial_private *priv, const struct pciserial_board *board, @@ -1480,6 +1491,7 @@ byt_serial_setup(struct serial_private *priv, port->port.type = PORT_16550A; port->port.flags = (port->port.flags | UPF_FIXED_PORT | UPF_FIXED_TYPE); port->port.set_termios = byt_set_termios; + port->port.get_mctrl = byt_get_mctrl; port->port.fifosize = 64; port->tx_loadsz = 64; port->dma = dma; |