diff options
| author | Sebastian Haas <sehaas@deebas.com> | 2017-03-04 23:06:33 +0100 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2017-03-09 18:19:07 +0100 |
| commit | 36a803d8c0b518ff498fb543f29aa48429147d37 (patch) | |
| tree | 14563900d8175c17e7d504afd1c05cbb636b01cd /drivers/staging | |
| parent | fae4ab6b4be4c40c6d5424eff2087444e7042c1b (diff) | |
staging: rtl8188eu: fix typos in macros
Rename macro definition and usage to represent correct spelling of DEFAULT:
ODM_REG_RX_DEFUALT_A_11N => ODM_REG_RX_DEFAULT_A_11N
ODM_REG_RX_DEFUALT_B_11N => ODM_REG_RX_DEFAULT_B_11N
Signed-off-by: Sebastian Haas <sehaas@deebas.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/staging')
| -rw-r--r-- | drivers/staging/rtl8188eu/hal/odm_RTL8188E.c | 4 | ||||
| -rw-r--r-- | drivers/staging/rtl8188eu/include/odm_RegDefine11N.h | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c index 55056ffec078..91e0f6cee8f4 100644 --- a/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c +++ b/drivers/staging/rtl8188eu/hal/odm_RTL8188E.c @@ -81,9 +81,9 @@ static void dm_trx_hw_antenna_div_init(struct odm_dm_struct *dm_odm) /* antenna mapping table */ if (!dm_odm->bIsMPChip) { /* testchip */ - phy_set_bb_reg(adapter, ODM_REG_RX_DEFUALT_A_11N, + phy_set_bb_reg(adapter, ODM_REG_RX_DEFAULT_A_11N, BIT(10) | BIT(9) | BIT(8), 1); - phy_set_bb_reg(adapter, ODM_REG_RX_DEFUALT_A_11N, + phy_set_bb_reg(adapter, ODM_REG_RX_DEFAULT_A_11N, BIT(13) | BIT(12) | BIT(11), 2); } else { /* MPchip */ phy_set_bb_reg(adapter, ODM_REG_ANT_MAPPING1_11N, bMaskDWord, diff --git a/drivers/staging/rtl8188eu/include/odm_RegDefine11N.h b/drivers/staging/rtl8188eu/include/odm_RegDefine11N.h index c82c09013487..f46f7d43ce00 100644 --- a/drivers/staging/rtl8188eu/include/odm_RegDefine11N.h +++ b/drivers/staging/rtl8188eu/include/odm_RegDefine11N.h @@ -41,8 +41,8 @@ #define ODM_REG_TX_ANT_CTRL_11N 0x80C #define ODM_REG_BB_PWR_SAV5_11N 0x818 #define ODM_REG_CCK_RPT_FORMAT_11N 0x824 -#define ODM_REG_RX_DEFUALT_A_11N 0x858 -#define ODM_REG_RX_DEFUALT_B_11N 0x85A +#define ODM_REG_RX_DEFAULT_A_11N 0x858 +#define ODM_REG_RX_DEFAULT_B_11N 0x85A #define ODM_REG_BB_PWR_SAV3_11N 0x85C #define ODM_REG_ANTSEL_CTRL_11N 0x860 #define ODM_REG_RX_ANT_CTRL_11N 0x864 |