diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-02-21 12:11:44 -0800 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-02-21 12:11:44 -0800 |
| commit | b5c78e04dd061b776978dad61dd85357081147b0 (patch) | |
| tree | 2416b2dc61c452c3aeb2a32bcedf15e6257be638 /drivers/staging/et131x | |
| parent | 06991c28f37ad68e5c03777f5c3b679b56e3dac1 (diff) | |
| parent | 951348b377385475aa256c27e1c9e2564c9ec160 (diff) | |
Merge tag 'staging-3.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging
Pull staging tree update from Greg Kroah-Hartman:
"Here's the big staging tree merge for 3.9-rc1
Lots of cleanups and updates for drivers all through the staging tree.
We are pretty much "code neutral" here, adding just about as many
lines as we removed.
All of these have been in linux-next for a while."
* tag 'staging-3.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: (804 commits)
staging: comedi: vmk80xx: wait for URBs to complete
staging: comedi: drivers: addi-data: hwdrv_apci3200.c: Add a missing semicolon
staging: et131x: Update TODO list
staging: et131x: Remove assignment of skb->dev
staging: wlan-ng: hfa384x.h: fix for error reported by smatch
staging/zache checkpatch ERROR: spaces prohibited around that
staging/ozwpan: Mark read only parameters and structs as const
staging/ozwpan: Remove empty and unused function oz_cdev_heartbeat
staging/ozwpan: Mark local functions as static (fix sparse warnings)
staging/ozwpan: Add missing header includes
staging/usbip: Mark local functions as static (fix sparse warnings)
staging/xgifb: Remove duplicated code in loops.
staging/xgifb: Consolidate return paths
staging/xgifb: Remove code without effect
staging/xgifb: Remove unnecessary casts
staging/xgifb: Consolidate if/else if with identical code branches
staging: vt6656: replaced custom TRUE definition with true
staging: vt6656: replaced custom FALSE definition with false
staging: vt6656: replace custom BOOL definition with bool
staging/rtl8187se: Mark functions as static to silence sparse
...
Diffstat (limited to 'drivers/staging/et131x')
| -rw-r--r-- | drivers/staging/et131x/README | 4 | ||||
| -rw-r--r-- | drivers/staging/et131x/et131x.c | 791 | ||||
| -rw-r--r-- | drivers/staging/et131x/et131x.h | 96 |
3 files changed, 434 insertions, 457 deletions
diff --git a/drivers/staging/et131x/README b/drivers/staging/et131x/README index 38537d4c4e14..05ad08501663 100644 --- a/drivers/staging/et131x/README +++ b/drivers/staging/et131x/README @@ -9,6 +9,10 @@ driver as they did not build properly at the time. TODO: - some rx packets have CRC/code/frame errors + - Look at reducing the number of spinlocks + - Simplify code in nic_rx_pkts(), when determining multicast_pkts_rcvd + - Implement NAPI support + - in et131x_tx(), don't return NETDEV_TX_BUSY, just drop the packet with kfree_skb(). Please send patches to: Greg Kroah-Hartman <gregkh@linuxfoundation.org> diff --git a/drivers/staging/et131x/et131x.c b/drivers/staging/et131x/et131x.c index a0a30b3f2dcd..42ae5e83f907 100644 --- a/drivers/staging/et131x/et131x.c +++ b/drivers/staging/et131x/et131x.c @@ -1,5 +1,4 @@ -/* - * Agere Systems Inc. +/* Agere Systems Inc. * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs * * Copyright © 2005 Agere Systems Inc. @@ -50,7 +49,6 @@ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * DAMAGE. - * */ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt @@ -102,8 +100,7 @@ MODULE_DESCRIPTION("10/100/1000 Base-T Ethernet Driver for the ET1310 by Agere S #define INTERNAL_MEM_RX_OFFSET 0x1FF /* 50% Tx, 50% Rx */ /* ISR defines */ -/* - * For interrupts, normal running is: +/* For interrupts, normal running is: * rxdma_xfr_done, phy_interrupt, mac_stat_interrupt, * watchdog_interrupt & txdma_xfer_done * @@ -139,19 +136,19 @@ MODULE_DESCRIPTION("10/100/1000 Base-T Ethernet Driver for the ET1310 by Agere S #define NIC_SEND_HANG_THRESHOLD 0 /* MP_TCB flags */ -#define fMP_DEST_MULTI 0x00000001 -#define fMP_DEST_BROAD 0x00000002 +#define FMP_DEST_MULTI 0x00000001 +#define FMP_DEST_BROAD 0x00000002 /* MP_ADAPTER flags */ -#define fMP_ADAPTER_INTERRUPT_IN_USE 0x00000008 +#define FMP_ADAPTER_INTERRUPT_IN_USE 0x00000008 /* MP_SHARED flags */ -#define fMP_ADAPTER_LOWER_POWER 0x00200000 +#define FMP_ADAPTER_LOWER_POWER 0x00200000 -#define fMP_ADAPTER_NON_RECOVER_ERROR 0x00800000 -#define fMP_ADAPTER_HARDWARE_ERROR 0x04000000 +#define FMP_ADAPTER_NON_RECOVER_ERROR 0x00800000 +#define FMP_ADAPTER_HARDWARE_ERROR 0x04000000 -#define fMP_ADAPTER_FAIL_SEND_MASK 0x3ff00000 +#define FMP_ADAPTER_FAIL_SEND_MASK 0x3ff00000 /* Some offsets in PCI config space that are actually used. */ #define ET1310_PCI_MAC_ADDRESS 0xA4 @@ -245,8 +242,7 @@ struct pkt_stat_desc { /* Typedefs for the RX DMA status word */ -/* - * rx status word 0 holds part of the status bits of the Rx DMA engine +/* rx status word 0 holds part of the status bits of the Rx DMA engine * that get copied out to memory by the ET-1310. Word 0 is a 32 bit word * which contains the Free Buffer ring 0 and 1 available offset. * @@ -256,8 +252,7 @@ struct pkt_stat_desc { * bit 26 Wrap flag for FBR0 */ -/* - * RXSTAT_WORD1_t structure holds part of the status bits of the Rx DMA engine +/* RXSTAT_WORD1_t structure holds part of the status bits of the Rx DMA engine * that get copied out to memory by the ET-1310. Word 3 is a 32 bit word * which contains the Packet Status Ring available offset. * @@ -267,8 +262,7 @@ struct pkt_stat_desc { * bit 29-31 unused */ -/* - * struct rx_status_block is a structure representing the status of the Rx +/* struct rx_status_block is a structure representing the status of the Rx * DMA engine it sits in free memory, and is pointed to by 0x101c / 0x1020 */ struct rx_status_block { @@ -276,8 +270,7 @@ struct rx_status_block { u32 word1; }; -/* - * Structure for look-up table holding free buffer ring pointers, addresses +/* Structure for look-up table holding free buffer ring pointers, addresses * and state. */ struct fbr_lookup { @@ -293,8 +286,7 @@ struct fbr_lookup { dma_addr_t buffsize; }; -/* - * struct rx_ring is the sructure representing the adaptor's local +/* struct rx_ring is the sructure representing the adaptor's local * reference(s) to the rings */ struct rx_ring { @@ -317,8 +309,7 @@ struct rx_ring { }; /* TX defines */ -/* - * word 2 of the control bits in the Tx Descriptor ring for the ET-1310 +/* word 2 of the control bits in the Tx Descriptor ring for the ET-1310 * * 0-15: length of packet * 16-27: VLAN tag @@ -344,6 +335,10 @@ struct rx_ring { * 14: UDP checksum assist */ +#define TXDESC_FLAG_LASTPKT 0x0001 +#define TXDESC_FLAG_FIRSTPKT 0x0002 +#define TXDESC_FLAG_INTPROC 0x0004 + /* struct tx_desc represents each descriptor on the ring */ struct tx_desc { u32 addr_hi; @@ -352,8 +347,7 @@ struct tx_desc { u32 flags; /* data (detailed above) */ }; -/* - * The status of the Tx DMA engine it sits in free memory, and is pointed to +/* The status of the Tx DMA engine it sits in free memory, and is pointed to * by 0x101c / 0x1020. This is a DMA10 type */ @@ -402,15 +396,13 @@ struct tx_ring { int since_irq; }; -/* - * Do not change these values: if changed, then change also in respective +/* Do not change these values: if changed, then change also in respective * TXdma and Rxdma engines */ #define NUM_DESC_PER_RING_TX 512 /* TX Do not change these values */ #define NUM_TCB 64 -/* - * These values are all superseded by registry entries to facilitate tuning. +/* These values are all superseded by registry entries to facilitate tuning. * Once the desired performance has been achieved, the optimal registry values * should be re-populated to these #defines: */ @@ -555,8 +547,7 @@ static int eeprom_wait_ready(struct pci_dev *pdev, u32 *status) u32 reg; int i; - /* - * 1. Check LBCIF Status Register for bits 6 & 3:2 all equal to 0 and + /* 1. Check LBCIF Status Register for bits 6 & 3:2 all equal to 0 and * bits 7,1:0 both equal to 1, at least once after reset. * Subsequent operations need only to check that bits 1:0 are equal * to 1 prior to starting a single byte read/write @@ -577,9 +568,7 @@ static int eeprom_wait_ready(struct pci_dev *pdev, u32 *status) return -ETIMEDOUT; } - -/** - * eeprom_write - Write a byte to the ET1310's EEPROM +/* eeprom_write - Write a byte to the ET1310's EEPROM * @adapter: pointer to our private adapter structure * @addr: the address to write * @data: the value to write @@ -597,8 +586,7 @@ static int eeprom_write(struct et131x_adapter *adapter, u32 addr, u8 data) u32 status; u32 val = 0; - /* - * For an EEPROM, an I2C single byte write is defined as a START + /* For an EEPROM, an I2C single byte write is defined as a START * condition followed by the device address, EEPROM address, one byte * of data and a STOP condition. The STOP condition will trigger the * EEPROM's internally timed write cycle to the nonvolatile memory. @@ -610,12 +598,11 @@ static int eeprom_write(struct et131x_adapter *adapter, u32 addr, u8 data) if (err) return err; - /* - * 2. Write to the LBCIF Control Register: bit 7=1, bit 6=1, bit 3=0, - * and bits 1:0 both =0. Bit 5 should be set according to the - * type of EEPROM being accessed (1=two byte addressing, 0=one - * byte addressing). - */ + /* 2. Write to the LBCIF Control Register: bit 7=1, bit 6=1, bit 3=0, + * and bits 1:0 both =0. Bit 5 should be set according to the + * type of EEPROM being accessed (1=two byte addressing, 0=one + * byte addressing). + */ if (pci_write_config_byte(pdev, LBCIF_CONTROL_REGISTER, LBCIF_CONTROL_LBCIF_ENABLE | LBCIF_CONTROL_I2C_WRITE)) return -EIO; @@ -628,14 +615,12 @@ static int eeprom_write(struct et131x_adapter *adapter, u32 addr, u8 data) /* Write the address to the LBCIF Address Register */ if (pci_write_config_dword(pdev, LBCIF_ADDRESS_REGISTER, addr)) break; - /* - * Write the data to the LBCIF Data Register (the I2C write + /* Write the data to the LBCIF Data Register (the I2C write * will begin). */ if (pci_write_config_byte(pdev, LBCIF_DATA_REGISTER, data)) break; - /* - * Monitor bit 1:0 of the LBCIF Status Register. When bits + /* Monitor bit 1:0 of the LBCIF Status Register. When bits * 1:0 are both equal to 1, the I2C write has completed and the * internal write cycle of the EEPROM is about to start. * (bits 1:0 = 01 is a legal state while waiting from both @@ -646,8 +631,7 @@ static int eeprom_write(struct et131x_adapter *adapter, u32 addr, u8 data) if (err < 0) return 0; - /* - * Check bit 3 of the LBCIF Status Register. If equal to 1, + /* Check bit 3 of the LBCIF Status Register. If equal to 1, * an error has occurred.Don't break here if we are revision * 1, this is so we do a blind write for load bug. */ @@ -655,8 +639,7 @@ static int eeprom_write(struct et131x_adapter *adapter, u32 addr, u8 data) && adapter->pdev->revision == 0) break; - /* - * Check bit 2 of the LBCIF Status Register. If equal to 1 an + /* Check bit 2 of the LBCIF Status Register. If equal to 1 an * ACK error has occurred on the address phase of the write. * This could be due to an actual hardware failure or the * EEPROM may still be in its internal write cycle from a @@ -664,8 +647,7 @@ static int eeprom_write(struct et131x_adapter *adapter, u32 addr, u8 data) *repeated later. */ if (status & LBCIF_STATUS_ACK_ERROR) { - /* - * This could be due to an actual hardware failure + /* This could be due to an actual hardware failure * or the EEPROM may still be in its internal write * cycle from a previous write. This write operation * was ignored and must be repeated later. @@ -678,8 +660,7 @@ static int eeprom_write(struct et131x_adapter *adapter, u32 addr, u8 data) break; } - /* - * Set bit 6 of the LBCIF Control Register = 0. + /* Set bit 6 of the LBCIF Control Register = 0. */ udelay(10); @@ -708,8 +689,7 @@ static int eeprom_write(struct et131x_adapter *adapter, u32 addr, u8 data) return writeok ? 0 : -EIO; } -/** - * eeprom_read - Read a byte from the ET1310's EEPROM +/* eeprom_read - Read a byte from the ET1310's EEPROM * @adapter: pointer to our private adapter structure * @addr: the address from which to read * @pdata: a pointer to a byte in which to store the value of the read @@ -724,16 +704,14 @@ static int eeprom_read(struct et131x_adapter *adapter, u32 addr, u8 *pdata) int err; u32 status; - /* - * A single byte read is similar to the single byte write, with the + /* A single byte read is similar to the single byte write, with the * exception of the data flow: */ err = eeprom_wait_ready(pdev, NULL); if (err) return err; - /* - * Write to the LBCIF Control Register: bit 7=1, bit 6=0, bit 3=0, + /* Write to the LBCIF Control Register: bit 7=1, bit 6=0, bit 3=0, * and bits 1:0 both =0. Bit 5 should be set according to the type * of EEPROM being accessed (1=two byte addressing, 0=one byte * addressing). @@ -741,27 +719,23 @@ static int eeprom_read(struct et131x_adapter *adapter, u32 addr, u8 *pdata) if (pci_write_config_byte(pdev, LBCIF_CONTROL_REGISTER, LBCIF_CONTROL_LBCIF_ENABLE)) return -EIO; - /* - * Write the address to the LBCIF Address Register (I2C read will + /* Write the address to the LBCIF Address Register (I2C read will * begin). */ if (pci_write_config_dword(pdev, LBCIF_ADDRESS_REGISTER, addr)) return -EIO; - /* - * Monitor bit 0 of the LBCIF Status Register. When = 1, I2C read + /* Monitor bit 0 of the LBCIF Status Register. When = 1, I2C read * is complete. (if bit 1 =1 and bit 0 stays = 0, a hardware failure * has occurred). */ err = eeprom_wait_ready(pdev, &status); if (err < 0) return err; - /* - * Regardless of error status, read data byte from LBCIF Data + /* Regardless of error status, read data byte from LBCIF Data * Register. */ *pdata = err; - /* - * Check bit 2 of the LBCIF Status Register. If = 1, + /* Check bit 2 of the LBCIF Status Register. If = 1, * then an error has occurred. */ return (status & LBCIF_STATUS_ACK_ERROR) ? -EIO : 0; @@ -775,13 +749,12 @@ static int et131x_init_eeprom(struct et131x_adapter *adapter) /* We first need to check the EEPROM Status code located at offset * 0xB2 of config space */ - pci_read_config_byte(pdev, ET1310_PCI_EEPROM_STATUS, - &eestatus); + pci_read_config_byte(pdev, ET1310_PCI_EEPROM_STATUS, &eestatus); /* THIS IS A WORKAROUND: * I need to call this function twice to get my card in a * LG M1 Express Dual running. I tried also a msleep before this - * function, because I thought there could be some time condidions + * function, because I thought there could be some time conditions * but it didn't work. Call the whole function twice also work. */ if (pci_read_config_byte(pdev, ET1310_PCI_EEPROM_STATUS, &eestatus)) { @@ -836,36 +809,35 @@ static int et131x_init_eeprom(struct et131x_adapter *adapter) return 0; } -/** - * et131x_rx_dma_enable - re-start of Rx_DMA on the ET1310. +/* et131x_rx_dma_enable - re-start of Rx_DMA on the ET1310. * @adapter: pointer to our adapter structure */ static void et131x_rx_dma_enable(struct et131x_adapter *adapter) { /* Setup the receive dma configuration register for normal operation */ - u32 csr = 0x2000; /* FBR1 enable */ + u32 csr = ET_RXDMA_CSR_FBR1_ENABLE; if (adapter->rx_ring.fbr[1]->buffsize == 4096) - csr |= 0x0800; + csr |= ET_RXDMA_CSR_FBR1_SIZE_LO; else if (adapter->rx_ring.fbr[1]->buffsize == 8192) - csr |= 0x1000; + csr |= ET_RXDMA_CSR_FBR1_SIZE_HI; else if (adapter->rx_ring.fbr[1]->buffsize == 16384) - csr |= 0x1800; + csr |= ET_RXDMA_CSR_FBR1_SIZE_LO | ET_RXDMA_CSR_FBR1_SIZE_HI; - csr |= 0x0400; /* FBR0 enable */ + csr |= ET_RXDMA_CSR_FBR0_ENABLE; if (adapter->rx_ring.fbr[0]->buffsize == 256) - csr |= 0x0100; + csr |= ET_RXDMA_CSR_FBR0_SIZE_LO; else if (adapter->rx_ring.fbr[0]->buffsize == 512) - csr |= 0x0200; + csr |= ET_RXDMA_CSR_FBR0_SIZE_HI; else if (adapter->rx_ring.fbr[0]->buffsize == 1024) - csr |= 0x0300; + csr |= ET_RXDMA_CSR_FBR0_SIZE_LO | ET_RXDMA_CSR_FBR0_SIZE_HI; writel(csr, &adapter->regs->rxdma.csr); csr = readl(&adapter->regs->rxdma.csr); - if (csr & 0x00020000) { + if (csr & ET_RXDMA_CSR_HALT_STATUS) { udelay(5); csr = readl(&adapter->regs->rxdma.csr); - if (csr & 0x00020000) { + if (csr & ET_RXDMA_CSR_HALT_STATUS) { dev_err(&adapter->pdev->dev, "RX Dma failed to exit halt state. CSR 0x%08x\n", csr); @@ -873,28 +845,27 @@ static void et131x_rx_dma_enable(struct et131x_adapter *adapter) } } -/** - * et131x_rx_dma_disable - Stop of Rx_DMA on the ET1310 +/* et131x_rx_dma_disable - Stop of Rx_DMA on the ET1310 * @adapter: pointer to our adapter structure */ static void et131x_rx_dma_disable(struct et131x_adapter *adapter) { u32 csr; /* Setup the receive dma configuration register */ - writel(0x00002001, &adapter->regs->rxdma.csr); + writel(ET_RXDMA_CSR_HALT | ET_RXDMA_CSR_FBR1_ENABLE, + &adapter->regs->rxdma.csr); csr = readl(&adapter->regs->rxdma.csr); - if ((csr & 0x00020000) == 0) { /* Check halt status (bit 17) */ + if (!(csr & ET_RXDMA_CSR_HALT_STATUS)) { udelay(5); csr = readl(&adapter->regs->rxdma.csr); - if ((csr & 0x00020000) == 0) + if (!(csr & ET_RXDMA_CSR_HALT_STATUS)) dev_err(&adapter->pdev->dev, - "RX Dma failed to enter halt state. CSR 0x%08x\n", - csr); + "RX Dma failed to enter halt state. CSR 0x%08x\n", + csr); } } -/** - * et131x_tx_dma_enable - re-start of Tx_DMA on the ET1310. +/* et131x_tx_dma_enable - re-start of Tx_DMA on the ET1310. * @adapter: pointer to our adapter structure * * Mainly used after a return to the D0 (full-power) state from a lower state. @@ -918,8 +889,7 @@ static inline void add_12bit(u32 *v, int n) *v = INDEX12(*v + n) | (*v & ET_DMA12_WRAP); } -/** - * et1310_config_mac_regs1 - Initialize the first part of MAC regs +/* et1310_config_mac_regs1 - Initialize the first part of MAC regs * @adapter: pointer to our adapter structure */ static void et1310_config_mac_regs1(struct et131x_adapter *adapter) @@ -932,7 +902,10 @@ static void et1310_config_mac_regs1(struct et131x_adapter *adapter) /* First we need to reset everything. Write to MAC configuration * register 1 to perform reset. */ - writel(0xC00F0000, ¯egs->cfg1); + writel(ET_MAC_CFG1_SOFT_RESET | ET_MAC_CFG1_SIM_RESET | + ET_MAC_CFG1_RESET_RXMC | ET_MAC_CFG1_RESET_TXMC | + ET_MAC_CFG1_RESET_RXFUNC | ET_MAC_CFG1_RESET_TXFUNC, + ¯egs->cfg1); /* Next lets configure the MAC Inter-packet gap register */ ipg = 0x38005860; /* IPG1 0x38 IPG2 0x58 B2B 0x60 */ @@ -947,7 +920,7 @@ static void et1310_config_mac_regs1(struct et131x_adapter *adapter) writel(0, ¯egs->if_ctrl); /* Let's move on to setting up the mii management configuration */ - writel(0x07, ¯egs->mii_mgmt_cfg); /* Clock reset 0x7 */ + writel(ET_MAC_MIIMGMT_CLK_RST, ¯egs->mii_mgmt_cfg); /* Next lets configure the MAC Station Address register. These * values are read from the EEPROM during initialization and stored @@ -978,8 +951,7 @@ static void et1310_config_mac_regs1(struct et131x_adapter *adapter) writel(0, ¯egs->cfg1); } -/** - * et1310_config_mac_regs2 - Initialize the second part of MAC regs +/* et1310_config_mac_regs2 - Initialize the second part of MAC regs * @adapter: pointer to our adapter structure */ static void et1310_config_mac_regs2(struct et131x_adapter *adapter) @@ -998,38 +970,44 @@ static void et1310_config_mac_regs2(struct et131x_adapter *adapter) ifctrl = readl(&mac->if_ctrl); /* Set up the if mode bits */ - cfg2 &= ~0x300; + cfg2 &= ~ET_MAC_CFG2_IFMODE_MASK; if (phydev && phydev->speed == SPEED_1000) { - cfg2 |= 0x200; + cfg2 |= ET_MAC_CFG2_IFMODE_1000; /* Phy mode bit */ - ifctrl &= ~(1 << 24); + ifctrl &= ~ET_MAC_IFCTRL_PHYMODE; } else { - cfg2 |= 0x100; - ifctrl |= (1 << 24); + cfg2 |= ET_MAC_CFG2_IFMODE_100; + ifctrl |= ET_MAC_IFCTRL_PHYMODE; } /* We need to enable Rx/Tx */ - cfg1 |= CFG1_RX_ENABLE | CFG1_TX_ENABLE | CFG1_TX_FLOW; + cfg1 |= ET_MAC_CFG1_RX_ENABLE | ET_MAC_CFG1_TX_ENABLE | + ET_MAC_CFG1_TX_FLOW; /* Initialize loop back to off */ - cfg1 &= ~(CFG1_LOOPBACK | CFG1_RX_FLOW); + cfg1 &= ~(ET_MAC_CFG1_LOOPBACK | ET_MAC_CFG1_RX_FLOW); if (adapter->flowcontrol == FLOW_RXONLY || adapter->flowcontrol == FLOW_BOTH) - cfg1 |= CFG1_RX_FLOW; + cfg1 |= ET_MAC_CFG1_RX_FLOW; writel(cfg1, &mac->cfg1); /* Now we need to initialize the MAC Configuration 2 register */ /* preamble 7, check length, huge frame off, pad crc, crc enable - full duplex off */ - cfg2 |= 0x7016; - cfg2 &= ~0x0021; + * full duplex off + */ + cfg2 |= 0x7 << ET_MAC_CFG2_PREAMBLE_SHIFT; + cfg2 |= ET_MAC_CFG2_IFMODE_LEN_CHECK; + cfg2 |= ET_MAC_CFG2_IFMODE_PAD_CRC; + cfg2 |= ET_MAC_CFG2_IFMODE_CRC_ENABLE; + cfg2 &= ~ET_MAC_CFG2_IFMODE_HUGE_FRAME; + cfg2 &= ~ET_MAC_CFG2_IFMODE_FULL_DPLX; /* Turn on duplex if needed */ if (phydev && phydev->duplex == DUPLEX_FULL) - cfg2 |= 0x01; + cfg2 |= ET_MAC_CFG2_IFMODE_FULL_DPLX; - ifctrl &= ~(1 << 26); + ifctrl &= ~ET_MAC_IFCTRL_GHDMODE; if (phydev && phydev->duplex == DUPLEX_HALF) - ifctrl |= (1<<26); /* Enable ghd */ + ifctrl |= ET_MAC_IFCTRL_GHDMODE; writel(ifctrl, &mac->if_ctrl); writel(cfg2, &mac->cfg2); @@ -1038,7 +1016,7 @@ static void et1310_config_mac_regs2(struct et131x_adapter *adapter) udelay(10); delay++; cfg1 = readl(&mac->cfg1); - } while ((cfg1 & CFG1_WAIT) != CFG1_WAIT && delay < 100); + } while ((cfg1 & ET_MAC_CFG1_WAIT) != ET_MAC_CFG1_WAIT && delay < 100); if (delay == 100) { dev_warn(&adapter->pdev->dev, @@ -1047,18 +1025,17 @@ static void et1310_config_mac_regs2(struct et131x_adapter *adapter) } /* Enable txmac */ - ctl |= 0x09; /* TX mac enable, FC disable */ + ctl |= ET_TX_CTRL_TXMAC_ENABLE | ET_TX_CTRL_FC_DISABLE; writel(ctl, &adapter->regs->txmac.ctl); /* Ready to start the RXDMA/TXDMA engine */ - if (adapter->flags & fMP_ADAPTER_LOWER_POWER) { + if (adapter->flags & FMP_ADAPTER_LOWER_POWER) { et131x_rx_dma_enable(adapter); et131x_tx_dma_enable(adapter); } } -/** - * et1310_in_phy_coma - check if the device is in phy coma +/* et1310_in_phy_coma - check if the device is in phy coma * @adapter: pointer to our adapter structure * * Returns 0 if the device is not in phy coma, 1 if it is in phy coma @@ -1139,19 +1116,19 @@ static void et1310_setup_device_for_unicast(struct et131x_adapter *adapter) * Set up unicast packet filter reg 3 to be the octets 2 - 5 of the * MAC address for first address */ - uni_pf3 = (adapter->addr[0] << ET_UNI_PF_ADDR2_1_SHIFT) | - (adapter->addr[1] << ET_UNI_PF_ADDR2_2_SHIFT) | - (adapter->addr[0] << ET_UNI_PF_ADDR1_1_SHIFT) | + uni_pf3 = (adapter->addr[0] << ET_RX_UNI_PF_ADDR2_1_SHIFT) | + (adapter->addr[1] << ET_RX_UNI_PF_ADDR2_2_SHIFT) | + (adapter->addr[0] << ET_RX_UNI_PF_ADDR1_1_SHIFT) | adapter->addr[1]; - uni_pf2 = (adapter->addr[2] << ET_UNI_PF_ADDR2_3_SHIFT) | - (adapter->addr[3] << ET_UNI_PF_ADDR2_4_SHIFT) | - (adapter->addr[4] << ET_UNI_PF_ADDR2_5_SHIFT) | + uni_pf2 = (adapter->addr[2] << ET_RX_UNI_PF_ADDR2_3_SHIFT) | + (adapter->addr[3] << ET_RX_UNI_PF_ADDR2_4_SHIFT) | + (adapter->addr[4] << ET_RX_UNI_PF_ADDR2_5_SHIFT) | adapter->addr[5]; - uni_pf1 = (adapter->addr[2] << ET_UNI_PF_ADDR1_3_SHIFT) | - (adapter->addr[3] << ET_UNI_PF_ADDR1_4_SHIFT) | - (adapter->addr[4] << ET_UNI_PF_ADDR1_5_SHIFT) | + uni_pf1 = (adapter->addr[2] << ET_RX_UNI_PF_ADDR1_3_SHIFT) | + (adapter->addr[3] << ET_RX_UNI_PF_ADDR1_4_SHIFT) | + (adapter->addr[4] << ET_RX_UNI_PF_ADDR1_5_SHIFT) | adapter->addr[5]; pm_csr = readl(&adapter->regs->global.pm_csr); @@ -1208,13 +1185,13 @@ static void et1310_config_rxmac_regs(struct et131x_adapter *adapter) writel(0, &rxmac->mask4_word3); /* Lets setup the WOL Source Address */ - sa_lo = (adapter->addr[2] << ET_WOL_LO_SA3_SHIFT) | - (adapter->addr[3] << ET_WOL_LO_SA4_SHIFT) | - (adapter->addr[4] << ET_WOL_LO_SA5_SHIFT) | + sa_lo = (adapter->addr[2] << ET_RX_WOL_LO_SA3_SHIFT) | + (adapter->addr[3] << ET_RX_WOL_LO_SA4_SHIFT) | + (adapter->addr[4] << ET_RX_WOL_LO_SA5_SHIFT) | adapter->addr[5]; writel(sa_lo, &rxmac->sa_lo); - sa_hi = (u32) (adapter->addr[0] << ET_WOL_HI_SA1_SHIFT) | + sa_hi = (u32) (adapter->addr[0] << ET_RX_WOL_HI_SA1_SHIFT) | adapter->addr[1]; writel(sa_hi, &rxmac->sa_hi); @@ -1224,7 +1201,7 @@ static void et1310_config_rxmac_regs(struct et131x_adapter *adapter) /* Let's initialize the Unicast Packet filtering address */ if (adapter->packet_filter & ET131X_PACKET_TYPE_DIRECTED) { et1310_setup_device_for_unicast(adapter); - pf_ctrl |= 4; /* Unicast filter */ + pf_ctrl |= ET_RX_PFCTRL_UNICST_FILTER_ENABLE; } else { writel(0, &rxmac->uni_pf_addr1); writel(0, &rxmac->uni_pf_addr2); @@ -1233,13 +1210,13 @@ static void et1310_config_rxmac_regs(struct et131x_adapter *adapter) /* Let's initialize the Multicast hash */ if (!(adapter->packet_filter & ET131X_PACKET_TYPE_ALL_MULTICAST)) { - pf_ctrl |= 2; /* Multicast filter */ + pf_ctrl |= ET_RX_PFCTRL_MLTCST_FILTER_ENABLE; et1310_setup_device_for_multicast(adapter); } /* Runt packet filtering. Didn't work in version A silicon. */ - pf_ctrl |= (NIC_MIN_PACKET_SIZE + 4) << 16; - pf_ctrl |= 8; /* Fragment filter */ + pf_ctrl |= (NIC_MIN_PACKET_SIZE + 4) << ET_RX_PFCTRL_MIN_PKT_SZ_SHIFT; + pf_ctrl |= ET_RX_PFCTRL_FRAG_FILTER_ENABLE; if (adapter->registry_jumbo_packet > 8192) /* In order to transmit jumbo packets greater than 8k, the @@ -1290,7 +1267,7 @@ static void et1310_config_rxmac_regs(struct et131x_adapter *adapter) * but we still leave the packet filter on. */ writel(pf_ctrl, &rxmac->pf_ctrl); - writel(0x9, &rxmac->ctrl); + writel(ET_RX_CTRL_RXMAC_ENABLE | ET_RX_CTRL_WOL_DISABLE, &rxmac->ctrl); } static void et1310_config_txmac_regs(struct et131x_adapter *adapter) @@ -1372,8 +1349,7 @@ static void et1310_config_macstat_regs(struct et131x_adapter *adapter) writel(0xFFFE7E8B, &macstat->carry_reg2_mask); } -/** - * et131x_phy_mii_read - Read from the PHY through the MII Interface on the MAC +/* et131x_phy_mii_read - Read from the PHY through the MII Interface on the MAC * @adapter: pointer to our private adapter structure * @addr: the address of the transceiver * @reg: the register to read @@ -1401,7 +1377,7 @@ static int et131x_phy_mii_read(struct et131x_adapter *adapter, u8 addr, writel(0, &mac->mii_mgmt_cmd); /* Set up the register we need to read from on the correct PHY */ - writel(MII_ADDR(addr, reg), &mac->mii_mgmt_addr); + writel(ET_MAC_MII_ADDR(addr, reg), &mac->mii_mgmt_addr); writel(0x1, &mac->mii_mgmt_cmd); @@ -1409,7 +1385,7 @@ static int et131x_phy_mii_read(struct et131x_adapter *adapter, u8 addr, udelay(50); delay++; mii_indicator = readl(&mac->mii_mgmt_indicator); - } while ((mii_indicator & MGMT_WAIT) && delay < 50); + } while ((mii_indicator & ET_MAC_MGMT_WAIT) && delay < 50); /* If we hit the max delay, we could not read the register */ if (delay == 50) { @@ -1422,8 +1398,9 @@ static int et131x_phy_mii_read(struct et131x_adapter *adapter, u8 addr, } /* If we hit here we were able to read the register and we need to - * return the value to the caller */ - *value = readl(&mac->mii_mgmt_stat) & 0xFFFF; + * return the value to the caller + */ + *value = readl(&mac->mii_mgmt_stat) & ET_MAC_MIIMGMT_STAT_PHYCRTL_MASK; /* Stop the read operation */ writel(0, &mac->mii_mgmt_cmd); @@ -1447,8 +1424,7 @@ static int et131x_mii_read(struct et131x_adapter *adapter, u8 reg, u16 *value) return et131x_phy_mii_read(adapter, phydev->addr, reg, value); } -/** - * et131x_mii_write - Write to a PHY register through the MII interface of the MAC +/* et131x_mii_write - Write to a PHY reg through the MII interface of the MAC * @adapter: pointer to our private adapter structure * @reg: the register to read * @value: 16-bit value to write @@ -1483,7 +1459,7 @@ static int et131x_mii_write(struct et131x_adapter *adapter, u8 reg, u16 value) writel(0, &mac->mii_mgmt_cmd); /* Set up the register we need to write to on the correct PHY */ - writel(MII_ADDR(addr, reg), &mac->mii_mgmt_addr); + writel(ET_MAC_MII_ADDR(addr, reg), &mac->mii_mgmt_addr); /* Add the value to write to the registers to the mac */ writel(value, &mac->mii_mgmt_ctrl); @@ -1492,7 +1468,7 @@ static int et131x_mii_write(struct et131x_adapter *adapter, u8 reg, u16 value) udelay(50); delay++; mii_indicator = readl(&mac->mii_mgmt_indicator); - } while ((mii_indicator & MGMT_BUSY) && delay < 100); + } while ((mii_indicator & ET_MAC_MGMT_BUSY) && delay < 100); /* If we hit the max delay, we could not write the register */ if (delay == 100) { @@ -1512,8 +1488,7 @@ static int et131x_mii_write(struct et131x_adapter *adapter, u8 reg, u16 value) /* Stop the write operation */ writel(0, &mac->mii_mgmt_cmd); - /* - * set the registers we touched back to the state at which we entered + /* set the registers we touched back to the state at which we entered * this function */ writel(mii_addr, &mac->mii_mgmt_addr); @@ -1528,7 +1503,7 @@ static void et1310_phy_access_mii_bit(struct et131x_adapter *adapter, u8 *value) { u16 reg; - u16 mask = 0x0001 << bitnum; + u16 mask = 1 << bitnum; /* Read the requested register */ et131x_mii_read(adapter, regnum, ®); @@ -1579,7 +1554,8 @@ static void et1310_config_flow_control(struct et131x_adapter *adapter) (remote_async_pause == TRUEPHY_BIT_CLEAR)) { adapter->flowcontrol = FLOW_NONE; } else {/* if (remote_pause == TRUEPHY_CLEAR_BIT && - remote_async_pause == TRUEPHY_SET_BIT) */ + * remote_async_pause == TRUEPHY_SET_BIT) + */ if (adapter->wanted_flow == FLOW_BOTH) adapter->flowcontrol = FLOW_RXONLY; else @@ -1588,8 +1564,7 @@ static void et1310_config_flow_control(struct et131x_adapter *adapter) } } -/** - * et1310_update_macstat_host_counters - Update the local copy of the statistics +/* et1310_update_macstat_host_counters - Update the local copy of the statistics * @adapter: pointer to the adapter structure */ static void et1310_update_macstat_host_counters(struct et131x_adapter *adapter) @@ -1616,8 +1591,7 @@ static void et1310_update_macstat_host_counters(struct et131x_adapter *adapter) stats->rx_other_errs += readl(&macstat->rx_fragment_packets); } -/** - * et1310_handle_macstat_interrupt +/* et1310_handle_macstat_interrupt * @adapter: pointer to the adapter structure * * One of the MACSTAT counters has wrapped. Update the local copy of @@ -1708,8 +1682,7 @@ static int et131x_mdio_reset(struct mii_bus *bus) return 0; } -/** - * et1310_phy_power_down - PHY power control +/* et1310_phy_power_down - PHY power control * @adapter: device to control * @down: true for off/false for back on * @@ -1729,8 +1702,7 @@ static void et1310_phy_power_down(struct et131x_adapter *adapter, bool down) et131x_mii_write(adapter, MII_BMCR, data); } -/** - * et131x_xcvr_init - Init the phy if we are setting it into force mode +/* et131x_xcvr_init - Init the phy if we are setting it into force mode * @adapter: pointer to our private adapter structure * */ @@ -1761,8 +1733,7 @@ static void et131x_xcvr_init(struct et131x_adapter *adapter) } } -/** - * et131x_configure_global_regs - configure JAGCore global regs +/* et131x_configure_global_regs - configure JAGCore global regs * @adapter: pointer to our adapter structure * * Used to configure the global registers on the JAGCore @@ -1808,8 +1779,7 @@ static void et131x_configure_global_regs(struct et131x_adapter *adapter) writel(0, ®s->watchdog_timer); } -/** - * et131x_config_rx_dma_regs - Start of Rx_DMA init sequence +/* et131x_config_rx_dma_regs - Start of Rx_DMA init sequence * @adapter: pointer to our adapter structure */ static void et131x_config_rx_dma_regs(struct et131x_adapter *adapter) @@ -1839,7 +1809,7 @@ static void et131x_config_rx_dma_regs(struct et131x_adapter *adapter) writel(rx_local->psr_num_entries - 1, &rx_dma->psr_num_des); writel(0, &rx_dma->psr_full_offset); - psr_num_des = readl(&rx_dma->psr_num_des) & 0xFFF; + psr_num_des = readl(&rx_dma->psr_num_des) & ET_RXDMA_PSR_NUM_DES_MASK; writel((psr_num_des * LO_MARK_PERCENT_FOR_PSR) / 100, &rx_dma->psr_min_des); @@ -1849,11 +1819,11 @@ static void et131x_config_rx_dma_regs(struct et131x_adapter *adapter) rx_local->local_psr_full = 0; for (id = 0; id < NUM_FBRS; id++) { - u32 *num_des; - u32 *full_offset; - u32 *min_des; - u32 *base_hi; - u32 *base_lo; + u32 __iomem *num_des; + u32 __iomem *full_offset; + u32 __iomem *min_des; + u32 __iomem *base_hi; + u32 __iomem *base_lo; if (id == 0) { num_des = &rx_dma->fbr0_num_des; @@ -1916,8 +1886,7 @@ static void et131x_config_rx_dma_regs(struct et131x_adapter *adapter) spin_unlock_irqrestore(&adapter->rcv_lock, flags); } -/** - * et131x_config_tx_dma_regs - Set up the tx dma section of the JAGCore. +/* et131x_config_tx_dma_regs - Set up the tx dma section of the JAGCore. * @adapter: pointer to our private adapter structure * * Configure the transmit engine with the ring buffers we have created @@ -1948,8 +1917,7 @@ static void et131x_config_tx_dma_regs(struct et131x_adapter *adapter) adapter->tx_ring.send_idx = 0; } -/** - * et131x_adapter_setup - Set the adapter up as per cassini+ documentation +/* et131x_adapter_setup - Set the adapter up as per cassini+ documentation * @adapter: pointer to our private adapter structure * * Returns 0 on success, errno on failure (as defined in errno.h) @@ -1977,23 +1945,29 @@ static void et131x_adapter_setup(struct et131x_adapter *adapter) et131x_xcvr_init(adapter); } -/** - * et131x_soft_reset - Issue a soft reset to the hardware, complete for ET1310 +/* et131x_soft_reset - Issue a soft reset to the hardware, complete for ET1310 * @adapter: pointer to our private adapter structure */ static void et131x_soft_reset(struct et131x_adapter *adapter) { - /* Disable MAC Core */ - writel(0xc00f0000, &adapter->regs->mac.cfg1); + u32 reg; - /* Set everything to a reset value */ - writel(0x7F, &adapter->regs->global.sw_reset); - writel(0x000f0000, &adapter->regs->mac.cfg1); - writel(0x00000000, &adapter->regs->mac.cfg1); + /* Disable MAC Core */ + reg = ET_MAC_CFG1_SOFT_RESET | ET_MAC_CFG1_SIM_RESET | + ET_MAC_CFG1_RESET_RXMC | ET_MAC_CFG1_RESET_TXMC | + ET_MAC_CFG1_RESET_RXFUNC | ET_MAC_CFG1_RESET_TXFUNC; + writel(reg, &adapter->regs->mac.cfg1); + + reg = ET_RESET_ALL; + writel(reg, &adapter->regs->global.sw_reset); + + reg = ET_MAC_CFG1_RESET_RXMC | ET_MAC_CFG1_RESET_TXMC | + ET_MAC_CFG1_RESET_RXFUNC | ET_MAC_CFG1_RESET_TXFUNC; + writel(reg, &adapter->regs->mac.cfg1); + writel(0, &adapter->regs->mac.cfg1); } -/** - * et131x_enable_interrupts - enable interrupt +/* et131x_enable_interrupts - enable interrupt * @adapter: et131x device * * Enable the appropriate interrupts on the ET131x according to our @@ -2013,8 +1987,7 @@ static void et131x_enable_interrupts(struct et131x_adapter *adapter) writel(mask, &adapter->regs->global.int_mask); } -/** - * et131x_disable_interrupts - interrupt disable +/* et131x_disable_interrupts - interrupt disable * @adapter: et131x device * * Block all interrupts from the et131x device at the device itself @@ -2025,19 +1998,17 @@ static void et131x_disable_interrupts(struct et131x_adapter *adapter) writel(INT_MASK_DISABLE, &adapter->regs->global.int_mask); } -/** - * et131x_tx_dma_disable - Stop of Tx_DMA on the ET1310 +/* et131x_tx_dma_disable - Stop of Tx_DMA on the ET1310 * @adapter: pointer to our adapter structure */ static void et131x_tx_dma_disable(struct et131x_adapter *adapter) { /* Setup the tramsmit dma configuration register */ - writel(ET_TXDMA_CSR_HALT|ET_TXDMA_SNGL_EPKT, + writel(ET_TXDMA_CSR_HALT | ET_TXDMA_SNGL_EPKT, &adapter->regs->txdma.csr); } -/** - * et131x_enable_txrx - Enable tx/rx queues +/* et131x_enable_txrx - Enable tx/rx queues * @netdev: device to be enabled */ static void et131x_enable_txrx(struct net_device *netdev) @@ -2049,15 +2020,14 @@ static void et131x_enable_txrx(struct net_device *netdev) et131x_tx_dma_enable(adapter); /* Enable device interrupts */ - if (adapter->flags & fMP_ADAPTER_INTERRUPT_IN_USE) + if (adapter->flags & FMP_ADAPTER_INTERRUPT_IN_USE) et131x_enable_interrupts(adapter); /* We're ready to move some data, so start the queue */ netif_start_queue(netdev); } -/** - * et131x_disable_txrx - Disable tx/rx queues +/* et131x_disable_txrx - Disable tx/rx queues * @netdev: device to be disabled */ static void et131x_disable_txrx(struct net_device *netdev) @@ -2075,8 +2045,7 @@ static void et131x_disable_txrx(struct net_device *netdev) et131x_disable_interrupts(adapter); } -/** - * et131x_init_send - Initialize send data structures +/* et131x_init_send - Initialize send data structures * @adapter: pointer to our private adapter structure */ static void et131x_init_send(struct et131x_adapter *adapter) @@ -2109,8 +2078,7 @@ static void et131x_init_send(struct et131x_adapter *adapter) tx_ring->send_tail = NULL; } -/** - * et1310_enable_phy_coma - called when network cable is unplugged +/* et1310_enable_phy_coma - called when network cable is unplugged * @adapter: pointer to our adapter structure * * driver receive an phy status change interrupt while in D0 and check that @@ -2139,8 +2107,7 @@ static void et1310_enable_phy_coma(struct et131x_adapter *adapter) /* Save the GbE PHY speed and duplex modes. Need to restore this * when cable is plugged back in */ - /* - * TODO - when PM is re-enabled, check if we need to + /* TODO - when PM is re-enabled, check if we need to * perform a similar task as this - * adapter->pdown_speed = adapter->ai_force_speed; * adapter->pdown_duplex = adapter->ai_force_duplex; @@ -2148,7 +2115,7 @@ static void et1310_enable_phy_coma(struct et131x_adapter *adapter) /* Stop sending packets. */ spin_lock_irqsave(&adapter->send_hw_lock, flags); - adapter->flags |= fMP_ADAPTER_LOWER_POWER; + adapter->flags |= FMP_ADAPTER_LOWER_POWER; spin_unlock_irqrestore(&adapter->send_hw_lock, flags); /* Wait for outstanding Receive packets */ @@ -2164,8 +2131,7 @@ static void et1310_enable_phy_coma(struct et131x_adapter *adapter) writel(pmcsr, &adapter->regs->global.pm_csr); } -/** - * et1310_disable_phy_coma - Disable the Phy Coma Mode +/* et1310_disable_phy_coma - Disable the Phy Coma Mode * @adapter: pointer to our adapter structure */ static void et1310_disable_phy_coma(struct et131x_adapter *adapter) @@ -2201,7 +2167,7 @@ static void et1310_disable_phy_coma(struct et131x_adapter *adapter) et131x_adapter_setup(adapter); /* Allow Tx to restart */ - adapter->flags &= ~fMP_ADAPTER_LOWER_POWER; + adapter->flags &= ~FMP_ADAPTER_LOWER_POWER; et131x_enable_txrx(adapter->netdev); } @@ -2211,9 +2177,10 @@ static inline u32 bump_free_buff_ring(u32 *free_buff_ring, u32 limit) u32 tmp_free_buff_ring = *free_buff_ring; tmp_free_buff_ring++; /* This works for all cases where limit < 1024. The 1023 case - works because 1023++ is 1024 which means the if condition is not - taken but the carry of the bit into the wrap bit toggles the wrap - value correctly */ + * works because 1023++ is 1024 which means the if condition is not + * taken but the carry of the bit into the wrap bit toggles the wrap + * value correctly + */ if ((tmp_free_buff_ring & ET_DMA10_MASK) > limit) { tmp_free_buff_ring &= ~ET_DMA10_MASK; tmp_free_buff_ring ^= ET_DMA10_WRAP; @@ -2224,8 +2191,7 @@ static inline u32 bump_free_buff_ring(u32 *free_buff_ring, u32 limit) return tmp_free_buff_ring; } -/** - * et131x_rx_dma_memory_alloc +/* et131x_rx_dma_memory_alloc * @adapter: pointer to our private adapter structure * * Returns 0 on success and errno on failure (as defined in errno.h) @@ -2365,8 +2331,7 @@ static int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter) pr_info("Packet Status Ring %llx\n", (unsigned long long) rx_ring->ps_ring_physaddr); - /* - * NOTE : dma_alloc_coherent(), used above to alloc DMA regions, + /* NOTE : dma_alloc_coherent(), used above to alloc DMA regions, * ALWAYS returns SAC (32-bit) addresses. If DAC (64-bit) addresses * are ever returned, make sure the high part is retrieved here before * storing the adjusted address. @@ -2392,8 +2357,7 @@ static int et131x_rx_dma_memory_alloc(struct et131x_adapter *adapter) return 0; } -/** - * et131x_rx_dma_memory_free - Free all memory allocated within this module. +/* et131x_rx_dma_memory_free - Free all memory allocated within this module. * @adapter: pointer to our private adapter structure */ static void et131x_rx_dma_memory_free(struct et131x_adapter *adapter) @@ -2480,8 +2444,7 @@ static void et131x_rx_dma_memory_free(struct et131x_adapter *adapter) rx_ring->num_ready_recv = 0; } -/** - * et131x_init_recv - Initialize receive data structures. +/* et131x_init_recv - Initialize receive data structures. * @adapter: pointer to our private adapter structure * * Returns 0 on success and errno on failure (as defined in errno.h) @@ -2499,11 +2462,8 @@ static int et131x_init_recv(struct et131x_adapter *adapter) /* Setup each RFD */ for (rfdct = 0; rfdct < rx_ring->num_rfd; rfdct++) { rfd = kzalloc(sizeof(struct rfd), GFP_ATOMIC | GFP_DMA); - - if (!rfd) { - dev_err(&adapter->pdev->dev, "Couldn't alloc RFD\n"); + if (!rfd) return -ENOMEM; - } rfd->skb = NULL; @@ -2518,8 +2478,7 @@ static int et131x_init_recv(struct et131x_adapter *adapter) return 0; } -/** - * et131x_set_rx_dma_timer - Set the heartbeat timer according to line rate. +/* et131x_set_rx_dma_timer - Set the heartbeat timer according to line rate. * @adapter: pointer to our adapter structure */ static void et131x_set_rx_dma_timer(struct et131x_adapter *adapter) @@ -2538,8 +2497,7 @@ static void et131x_set_rx_dma_timer(struct et131x_adapter *adapter) } } -/** - * NICReturnRFD - Recycle a RFD and put it back onto the receive list +/* NICReturnRFD - Recycle a RFD and put it back onto the receive list * @adapter: pointer to our adapter * @rfd: pointer to the RFD */ @@ -2555,7 +2513,7 @@ static void nic_return_rfd(struct et131x_adapter *adapter, struct rfd *rfd) * need to clean up OOB data */ if (buff_index < rx_local->fbr[ring_index]->num_entries) { - u32 *offset; + u32 __iomem *offset; struct fbr_desc *next; spin_lock_irqsave(&adapter->fbr_lock, flags); @@ -2599,8 +2557,7 @@ static void nic_return_rfd(struct et131x_adapter *adapter, struct rfd *rfd) WARN_ON(rx_local->num_ready_recv > rx_local->num_rfd); } -/** - * nic_rx_pkts - Checks the hardware for available packets +/* nic_rx_pkts - Checks the hardware for available packets * @adapter: pointer to our adapter * * Returns rfd, a pointer to our MPRFD. @@ -2773,7 +2730,6 @@ static struct rfd *nic_rx_pkts(struct et131x_adapter *adapter) rx_local->fbr[ring_index]->virt[buff_index], rfd->len); - skb->dev = adapter->netdev; skb->protocol = eth_type_trans(skb, adapter->netdev); skb->ip_summed = CHECKSUM_NONE; netif_rx_ni(skb); @@ -2783,8 +2739,7 @@ out: return rfd; } -/** - * et131x_handle_recv_interrupt - Interrupt handler for receive processing +/* et131x_handle_recv_interrupt - Interrupt handler for receive processing * @adapter: pointer to our adapter * * Assumption, Rcv spinlock has been acquired. @@ -2838,8 +2793,7 @@ static void et131x_handle_recv_interrupt(struct et131x_adapter *adapter) adapter->rx_ring.unfinished_receives = false; } -/** - * et131x_tx_dma_memory_alloc +/* et131x_tx_dma_memory_alloc * @adapter: pointer to our private adapter structure * * Returns 0 on success and errno on failure (as defined in errno.h). @@ -2856,12 +2810,10 @@ static int et131x_tx_dma_memory_alloc(struct et131x_adapter *adapter) struct tx_ring *tx_ring = &adapter->tx_ring; /* Allocate memory for the TCB's (Transmit Control Block) */ - adapter->tx_ring.tcb_ring = - kcalloc(NUM_TCB, sizeof(struct tcb), GFP_ATOMIC | GFP_DMA); - if (!adapter->tx_ring.tcb_ring) { - dev_err(&adapter->pdev->dev, "Cannot alloc memory for TCBs\n"); + adapter->tx_ring.tcb_ring = kcalloc(NUM_TCB, sizeof(struct tcb), + GFP_ATOMIC | GFP_DMA); + if (!adapter->tx_ring.tcb_ring) return -ENOMEM; - } desc_size = (sizeof(struct tx_desc) * NUM_DESC_PER_RING_TX); tx_ring->tx_desc_ring = @@ -2895,8 +2847,7 @@ static int et131x_tx_dma_memory_alloc(struct et131x_adapter *adapter) return 0; } -/** - * et131x_tx_dma_memory_free - Free all memory allocated within this module +/* et131x_tx_dma_memory_free - Free all memory allocated within this module * @adapter: pointer to our private adapter structure * * Returns 0 on success and errno on failure (as defined in errno.h). @@ -2928,8 +2879,7 @@ static void et131x_tx_dma_memory_free(struct et131x_adapter *adapter) kfree(adapter->tx_ring.tcb_ring); } -/** - * nic_send_packet - NIC specific send handler for version B silicon. +/* nic_send_packet - NIC specific send handler for version B silicon. * @adapter: pointer to our adapter * @tcb: pointer to struct tcb * @@ -2977,7 +2927,8 @@ static int nic_send_packet(struct et131x_adapter *adapter, struct tcb *tcb) */ if (skb_headlen(skb) <= 1514) { /* Low 16bits are length, high is vlan and - unused currently so zero */ + * unused currently so zero + */ desc[frag].len_vlan = skb_headlen(skb); dma_addr = dma_map_single(&adapter->pdev->dev, skb->data, @@ -3022,23 +2973,24 @@ static int nic_send_packet(struct et131x_adapter *adapter, struct tcb *tcb) if (phydev && phydev->speed == SPEED_1000) { if (++adapter->tx_ring.since_irq == PARM_TX_NUM_BUFS_DEF) { /* Last element & Interrupt flag */ - desc[frag - 1].flags = 0x5; + desc[frag - 1].flags = + TXDESC_FLAG_INTPROC | TXDESC_FLAG_LASTPKT; adapter->tx_ring.since_irq = 0; } else { /* Last element */ - desc[frag - 1].flags = 0x1; + desc[frag - 1].flags = TXDESC_FLAG_LASTPKT; } } else - desc[frag - 1].flags = 0x5; + desc[frag - 1].flags = + TXDESC_FLAG_INTPROC | TXDESC_FLAG_LASTPKT; - desc[0].flags |= 2; /* First element flag */ + desc[0].flags |= TXDESC_FLAG_FIRSTPKT; tcb->index_start = adapter->tx_ring.send_idx; tcb->stale = 0; spin_lock_irqsave(&adapter->send_hw_lock, flags); - thiscopy = NUM_DESC_PER_RING_TX - - INDEX10(adapter->tx_ring.send_idx); + thiscopy = NUM_DESC_PER_RING_TX - INDEX10(adapter->tx_ring.send_idx); if (thiscopy >= frag) { remainder = 0; @@ -3106,8 +3058,7 @@ static int nic_send_packet(struct et131x_adapter *adapter, struct tcb *tcb) return 0; } -/** - * send_packet - Do the work to send a packet +/* send_packet - Do the work to send a packet * @skb: the packet(s) to send * @adapter: a pointer to the device's private adapter structure * @@ -3150,9 +3101,9 @@ static int send_packet(struct sk_buff *skb, struct et131x_adapter *adapter) if ((shbufva[0] == 0xffff) && (shbufva[1] == 0xffff) && (shbufva[2] == 0xffff)) { - tcb->flags |= fMP_DEST_BROAD; + tcb->flags |= FMP_DEST_BROAD; } else if ((shbufva[0] & 0x3) == 0x0001) { - tcb->flags |= fMP_DEST_MULTI; + tcb->flags |= FMP_DEST_MULTI; } } @@ -3178,8 +3129,7 @@ static int send_packet(struct sk_buff *skb, struct et131x_adapter *adapter) return 0; } -/** - * et131x_send_packets - This function is called by the OS to send packets +/* et131x_send_packets - This function is called by the OS to send packets * @skb: the packet(s) to send * @netdev:device on which to TX the above packet(s) * @@ -3207,7 +3157,7 @@ static int et131x_send_packets(struct sk_buff *skb, struct net_device *netdev) /* We need to see if the link is up; if it's not, make the * netif layer think we're good and drop the packet */ - if ((adapter->flags & fMP_ADAPTER_FAIL_SEND_MASK) || + if ((adapter->flags & FMP_ADAPTER_FAIL_SEND_MASK) || !netif_carrier_ok(netdev)) { dev_kfree_skb_any(skb); skb = NULL; @@ -3228,8 +3178,7 @@ static int et131x_send_packets(struct sk_buff *skb, struct net_device *netdev) return status; } -/** - * free_send_packet - Recycle a struct tcb +/* free_send_packet - Recycle a struct tcb * @adapter: pointer to our adapter * @tcb: pointer to struct tcb * @@ -3244,9 +3193,9 @@ static inline void free_send_packet(struct et131x_adapter *adapter, struct net_device_stats *stats = &adapter->net_stats; u64 dma_addr; - if (tcb->flags & fMP_DEST_BROAD) + if (tcb->flags & FMP_DEST_BROAD) atomic_inc(&adapter->stats.broadcast_pkts_xmtd); - else if (tcb->flags & fMP_DEST_MULTI) + else if (tcb->flags & FMP_DEST_MULTI) atomic_inc(&adapter->stats.multicast_pkts_xmtd); else atomic_inc(&adapter->stats.unicast_pkts_xmtd); @@ -3301,8 +3250,7 @@ static inline void free_send_packet(struct et131x_adapter *adapter, WARN_ON(adapter->tx_ring.used < 0); } -/** - * et131x_free_busy_send_packets - Free and complete the stopped active sends +/* et131x_free_busy_send_packets - Free and complete the stopped active sends * @adapter: pointer to our adapter * * Assumption - Send spinlock has been acquired @@ -3345,8 +3293,7 @@ static void et131x_free_busy_send_packets(struct et131x_adapter *adapter) adapter->tx_ring.used = 0; } -/** - * et131x_handle_send_interrupt - Interrupt handler for sending processing +/* et131x_handle_send_interrupt - Interrupt handler for sending processing * @adapter: pointer to our adapter * * Re-claim the send resources, complete sends and get more to send from @@ -3438,6 +3385,7 @@ static void et131x_get_regs(struct net_device *netdev, struct address_map __iomem *aregs = adapter->regs; u32 *regs_buff = regs_data; u32 num = 0; + u16 tmp; memset(regs_data, 0, et131x_get_regs_len(netdev)); @@ -3445,44 +3393,68 @@ static void et131x_get_regs(struct net_device *netdev, adapter->pdev->device; /* PHY regs */ - et131x_mii_read(adapter, MII_BMCR, (u16 *)®s_buff[num++]); - et131x_mii_read(adapter, MII_BMSR, (u16 *)®s_buff[num++]); - et131x_mii_read(adapter, MII_PHYSID1, (u16 *)®s_buff[num++]); - et131x_mii_read(adapter, MII_PHYSID2, (u16 *)®s_buff[num++]); - et131x_mii_read(adapter, MII_ADVERTISE, (u16 *)®s_buff[num++]); - et131x_mii_read(adapter, MII_LPA, (u16 *)®s_buff[num++]); - et131x_mii_read(adapter, MII_EXPANSION, (u16 *)®s_buff[num++]); + et131x_mii_read(adapter, MII_BMCR, &tmp); + regs_buff[num++] = tmp; + et131x_mii_read(adapter, MII_BMSR, &tmp); + regs_buff[num++] = tmp; + et131x_mii_read(adapter, MII_PHYSID1, &tmp); + regs_buff[num++] = tmp; + et131x_mii_read(adapter, MII_PHYSID2, &tmp); + regs_buff[num++] = tmp; + et131x_mii_read(adapter, MII_ADVERTISE, &tmp); + regs_buff[num++] = tmp; + et131x_mii_read(adapter, MII_LPA, &tmp); + regs_buff[num++] = tmp; + et131x_mii_read(adapter, MII_EXPANSION, &tmp); + regs_buff[num++] = tmp; /* Autoneg next page transmit reg */ - et131x_mii_read(adapter, 0x07, (u16 *)®s_buff[num++]); + et131x_mii_read(adapter, 0x07, &tmp); + regs_buff[num++] = tmp; /* Link partner next page reg */ - et131x_mii_read(adapter, 0x08, (u16 *)®s_buff[num++]); - et131x_mii_read(adapter, MII_CTRL1000, (u16 *)®s_buff[num++]); - et131x_mii_read(adapter, MII_STAT1000, (u16 *)®s_buff[num++]); - et131x_mii_read(adapter, 0x0b, (u16 *)®s_buff[num++]); - et131x_mii_read(adapter, 0x0c, (u16 *)®s_buff[num++]); - et131x_mii_read(adapter, MII_MMD_CTRL, (u16 *)®s_buff[num++]); - et131x_mii_read(adapter, MII_MMD_DATA, (u16 *)®s_buff[num++]); - et131x_mii_read(adapter, MII_ESTATUS, (u16 *)®s_buff[num++]); - - et131x_mii_read(adapter, PHY_INDEX_REG, (u16 *)®s_buff[num++]); - et131x_mii_read(adapter, PHY_DATA_REG, (u16 *)®s_buff[num++]); - et131x_mii_read(adapter, PHY_MPHY_CONTROL_REG, - (u16 *)®s_buff[num++]); - et131x_mii_read(adapter, PHY_LOOPBACK_CONTROL, - (u16 *)®s_buff[num++]); - et131x_mii_read(adapter, PHY_LOOPBACK_CONTROL+1, - (u16 *)®s_buff[num++]); - - et131x_mii_read(adapter, PHY_REGISTER_MGMT_CONTROL, - (u16 *)®s_buff[num++]); - et131x_mii_read(adapter, PHY_CONFIG, (u16 *)®s_buff[num++]); - et131x_mii_read(adapter, PHY_PHY_CONTROL, (u16 *)®s_buff[num++]); - et131x_mii_read(adapter, PHY_INTERRUPT_MASK, (u16 *)®s_buff[num++]); - et131x_mii_read(adapter, PHY_INTERRUPT_STATUS, - (u16 *)®s_buff[num++]); - et131x_mii_read(adapter, PHY_PHY_STATUS, (u16 *)®s_buff[num++]); - et131x_mii_read(adapter, PHY_LED_1, (u16 *)®s_buff[num++]); - et131x_mii_read(adapter, PHY_LED_2, (u16 *)®s_buff[num++]); + et131x_mii_read(adapter, 0x08, &tmp); + regs_buff[num++] = tmp; + et131x_mii_read(adapter, MII_CTRL1000, &tmp); + regs_buff[num++] = tmp; + et131x_mii_read(adapter, MII_STAT1000, &tmp); + regs_buff[num++] = tmp; + et131x_mii_read(adapter, 0x0b, &tmp); + regs_buff[num++] = tmp; + et131x_mii_read(adapter, 0x0c, &tmp); + regs_buff[num++] = tmp; + et131x_mii_read(adapter, MII_MMD_CTRL, &tmp); + regs_buff[num++] = tmp; + et131x_mii_read(adapter, MII_MMD_DATA, &tmp); + regs_buff[num++] = tmp; + et131x_mii_read(adapter, MII_ESTATUS, &tmp); + regs_buff[num++] = tmp; + + et131x_mii_read(adapter, PHY_INDEX_REG, &tmp); + regs_buff[num++] = tmp; + et131x_mii_read(adapter, PHY_DATA_REG, &tmp); + regs_buff[num++] = tmp; + et131x_mii_read(adapter, PHY_MPHY_CONTROL_REG, &tmp); + regs_buff[num++] = tmp; + et131x_mii_read(adapter, PHY_LOOPBACK_CONTROL, &tmp); + regs_buff[num++] = tmp; + et131x_mii_read(adapter, PHY_LOOPBACK_CONTROL + 1, &tmp); + regs_buff[num++] = tmp; + + et131x_mii_read(adapter, PHY_REGISTER_MGMT_CONTROL, &tmp); + regs_buff[num++] = tmp; + et131x_mii_read(adapter, PHY_CONFIG, &tmp); + regs_buff[num++] = tmp; + et131x_mii_read(adapter, PHY_PHY_CONTROL, &tmp); + regs_buff[num++] = tmp; + et131x_mii_read(adapter, PHY_INTERRUPT_MASK, &tmp); + regs_buff[num++] = tmp; + et131x_mii_read(adapter, PHY_INTERRUPT_STATUS, &tmp); + regs_buff[num++] = tmp; + et131x_mii_read(adapter, PHY_PHY_STATUS, &tmp); + regs_buff[num++] = tmp; + et131x_mii_read(adapter, PHY_LED_1, &tmp); + regs_buff[num++] = tmp; + et131x_mii_read(adapter, PHY_LED_2, &tmp); + regs_buff[num++] = tmp; /* Global regs */ regs_buff[num++] = readl(&aregs->global.txq_start_addr); @@ -3579,8 +3551,8 @@ static struct ethtool_ops et131x_ethtool_ops = { .get_regs = et131x_get_regs, .get_link = ethtool_op_get_link, }; -/** - * et131x_hwaddr_init - set up the MAC Address on the ET1310 + +/* et131x_hwaddr_init - set up the MAC Address on the ET1310 * @adapter: pointer to our private adapter structure */ static void et131x_hwaddr_init(struct et131x_adapter *adapter) @@ -3590,14 +3562,12 @@ static void et131x_hwaddr_init(struct et131x_adapter *adapter) * device */ if (is_zero_ether_addr(adapter->rom_addr)) { - /* - * We need to randomly generate the last octet so we + /* We need to randomly generate the last octet so we * decrease our chances of setting the mac address to * same as another one of our cards in the system */ get_random_bytes(&adapter->addr[5], 1); - /* - * We have the default value in the register we are + /* We have the default value in the register we are * working with so we need to copy the current * address into the permanent address */ @@ -3613,8 +3583,7 @@ static void et131x_hwaddr_init(struct et131x_adapter *adapter) } } -/** - * et131x_pci_init - initial PCI setup +/* et131x_pci_init - initial PCI setup * @adapter: pointer to our private adapter structure * @pdev: our PCI device * @@ -3706,8 +3675,7 @@ err_out: goto out; } -/** - * et131x_error_timer_handler +/* et131x_error_timer_handler * @data: timer-specific variable; here a pointer to our adapter structure * * The routine called when the error timer expires, to track the number of @@ -3721,7 +3689,8 @@ static void et131x_error_timer_handler(unsigned long data) if (et1310_in_phy_coma(adapter)) { /* Bring the device immediately out of coma, to * prevent it from sleeping indefinitely, this - * mechanism could be improved! */ + * mechanism could be improved! + */ et1310_disable_phy_coma(adapter); adapter->boot_coma = 20; } else { @@ -3747,8 +3716,7 @@ static void et131x_error_timer_handler(unsigned long data) mod_timer(&adapter->error_timer, jiffies + TX_ERROR_PERIOD * HZ / 1000); } -/** - * et131x_adapter_memory_free - Free all memory allocated for use by Tx & Rx +/* et131x_adapter_memory_free - Free all memory allocated for use by Tx & Rx * @adapter: pointer to our private adapter structure */ static void et131x_adapter_memory_free(struct et131x_adapter *adapter) @@ -3758,8 +3726,7 @@ static void et131x_adapter_memory_free(struct et131x_adapter *adapter) et131x_rx_dma_memory_free(adapter); } -/** - * et131x_adapter_memory_alloc +/* et131x_adapter_memory_alloc * @adapter: pointer to our private adapter structure * * Returns 0 on success, errno on failure (as defined in errno.h). @@ -3801,60 +3768,54 @@ static void et131x_adjust_link(struct net_device *netdev) struct et131x_adapter *adapter = netdev_priv(netdev); struct phy_device *phydev = adapter->phydev; - if (netif_carrier_ok(netdev)) { - adapter->boot_coma = 20; - - if (phydev && phydev->speed == SPEED_10) { - /* - * NOTE - Is there a way to query this without - * TruePHY? - * && TRU_QueryCoreType(adapter->hTruePhy, 0)== - * EMI_TRUEPHY_A13O) { - */ - u16 register18; - - et131x_mii_read(adapter, PHY_MPHY_CONTROL_REG, - ®ister18); - et131x_mii_write(adapter, PHY_MPHY_CONTROL_REG, - register18 | 0x4); - et131x_mii_write(adapter, PHY_INDEX_REG, - register18 | 0x8402); - et131x_mii_write(adapter, PHY_DATA_REG, - register18 | 511); - et131x_mii_write(adapter, PHY_MPHY_CONTROL_REG, - register18); - } - - et1310_config_flow_control(adapter); - - if (phydev && phydev->speed == SPEED_1000 && - adapter->registry_jumbo_packet > 2048) { - u16 reg; - - et131x_mii_read(adapter, PHY_CONFIG, ®); - reg &= ~ET_PHY_CONFIG_TX_FIFO_DEPTH; - reg |= ET_PHY_CONFIG_FIFO_DEPTH_32; - et131x_mii_write(adapter, PHY_CONFIG, reg); - } - - et131x_set_rx_dma_timer(adapter); - et1310_config_mac_regs2(adapter); - } - if (phydev && phydev->link != adapter->link) { - /* - * Check to see if we are in coma mode and if + /* Check to see if we are in coma mode and if * so, disable it because we will not be able * to read PHY values until we are out. */ if (et1310_in_phy_coma(adapter)) et1310_disable_phy_coma(adapter); + adapter->link = phydev->link; + phy_print_status(phydev); + if (phydev->link) { adapter->boot_coma = 20; + if (phydev && phydev->speed == SPEED_10) { + /* NOTE - Is there a way to query this without + * TruePHY? + * && TRU_QueryCoreType(adapter->hTruePhy, 0)== + * EMI_TRUEPHY_A13O) { + */ + u16 register18; + + et131x_mii_read(adapter, PHY_MPHY_CONTROL_REG, + ®ister18); + et131x_mii_write(adapter, PHY_MPHY_CONTROL_REG, + register18 | 0x4); + et131x_mii_write(adapter, PHY_INDEX_REG, + register18 | 0x8402); + et131x_mii_write(adapter, PHY_DATA_REG, + register18 | 511); + et131x_mii_write(adapter, PHY_MPHY_CONTROL_REG, + register18); + } + + et1310_config_flow_control(adapter); + + if (phydev && phydev->speed == SPEED_1000 && + adapter->registry_jumbo_packet > 2048) { + u16 reg; + + et131x_mii_read(adapter, PHY_CONFIG, ®); + reg &= ~ET_PHY_CONFIG_TX_FIFO_DEPTH; + reg |= ET_PHY_CONFIG_FIFO_DEPTH_32; + et131x_mii_write(adapter, PHY_CONFIG, reg); + } + + et131x_set_rx_dma_timer(adapter); + et1310_config_mac_regs2(adapter); } else { - dev_warn(&adapter->pdev->dev, - "Link down - cable problem ?\n"); adapter->boot_coma = 0; if (phydev->speed == SPEED_10) { @@ -3883,8 +3844,7 @@ static void et131x_adjust_link(struct net_device *netdev) /* Re-initialize the send structures */ et131x_init_send(adapter); - /* - * Bring the device back to the state it was during + /* Bring the device back to the state it was during * init prior to autonegotiation being complete. This * way, when we get the auto-neg complete interrupt, * we can complete init by calling config_mac_regs2. @@ -3899,9 +3859,6 @@ static void et131x_adjust_link(struct net_device *netdev) et131x_enable_txrx(netdev); } - adapter->link = phydev->link; - - phy_print_status(phydev); } } @@ -3944,8 +3901,7 @@ static int et131x_mii_probe(struct net_device *netdev) return 0; } -/** - * et131x_adapter_init +/* et131x_adapter_init * @adapter: pointer to the private adapter struct * @pdev: pointer to the PCI device * @@ -3982,8 +3938,7 @@ static struct et131x_adapter *et131x_adapter_init(struct net_device *netdev, return adapter; } -/** - * et131x_pci_remove +/* et131x_pci_remove * @pdev: a pointer to the device's pci_dev structure * * Registered in the pci_driver structure, this function is called when the @@ -4010,8 +3965,7 @@ static void et131x_pci_remove(struct pci_dev *pdev) pci_disable_device(pdev); } -/** - * et131x_up - Bring up a device for use. +/* et131x_up - Bring up a device for use. * @netdev: device to be opened */ static void et131x_up(struct net_device *netdev) @@ -4022,8 +3976,7 @@ static void et131x_up(struct net_device *netdev) phy_start(adapter->phydev); } -/** - * et131x_down - Bring down the device +/* et131x_down - Bring down the device * @netdev: device to be brought down */ static void et131x_down(struct net_device *netdev) @@ -4072,14 +4025,13 @@ static SIMPLE_DEV_PM_OPS(et131x_pm_ops, et131x_suspend, et131x_resume); #define ET131X_PM_OPS NULL #endif -/** - * et131x_isr - The Interrupt Service Routine for the driver. +/* et131x_isr - The Interrupt Service Routine for the driver. * @irq: the IRQ on which the interrupt was received. * @dev_id: device-specific info (here a pointer to a net_device struct) * * Returns a value indicating if the interrupt was handled. */ -irqreturn_t et131x_isr(int irq, void *dev_id) +static irqreturn_t et131x_isr(int irq, void *dev_id) { bool handled = true; struct net_device *netdev = (struct net_device *)dev_id; @@ -4161,8 +4113,7 @@ out: return IRQ_RETVAL(handled); } -/** - * et131x_isr_handler - The ISR handler +/* et131x_isr_handler - The ISR handler * @p_adapter, a pointer to the device's private adapter structure * * scheduled to run in a deferred context by the ISR. This is where the ISR's @@ -4175,8 +4126,7 @@ static void et131x_isr_handler(struct work_struct *work) u32 status = adapter->stats.interrupt_status; struct address_map __iomem *iomem = adapter->regs; - /* - * These first two are by far the most common. Once handled, we clear + /* These first two are by far the most common. Once handled, we clear * their two bits in the status word. If the word is now zero, we * exit. */ @@ -4207,8 +4157,7 @@ static void et131x_isr_handler(struct work_struct *work) /* Handle Free Buffer Ring 0 and 1 Low interrupt */ if (status & (ET_INTR_RXDMA_FB_R0_LOW | ET_INTR_RXDMA_FB_R1_LOW)) { - /* - * This indicates the number of unused buffers in RXDMA free + /* This indicates the number of unused buffers in RXDMA free * buffer ring 0 is <= the limit you programmed. Free buffer * resources need to be returned. Free buffers are consumed as * packets are passed from the network to the host. The host @@ -4220,16 +4169,14 @@ static void et131x_isr_handler(struct work_struct *work) * method of returning resources. */ - /* - * If the user has flow control on, then we will + /* If the user has flow control on, then we will * send a pause packet, otherwise just exit */ if (adapter->flowcontrol == FLOW_TXONLY || adapter->flowcontrol == FLOW_BOTH) { u32 pm_csr; - /* - * Tell the device to send a pause packet via the back + /* Tell the device to send a pause packet via the back * pressure register (bp req and bp xon/xoff) */ pm_csr = readl(&iomem->global.pm_csr); @@ -4240,8 +4187,7 @@ static void et131x_isr_handler(struct work_struct *work) /* Handle Packet Status Ring Low Interrupt */ if (status & ET_INTR_RXDMA_STAT_LOW) { - /* - * Same idea as with the two Free Buffer Rings. Packets going + /* Same idea as with the two Free Buffer Rings. Packets going * from the network to the host each consume a free buffer * resource and a packet status resource. These resoures are * passed to the OS. When the OS is done with the resources, @@ -4252,8 +4198,7 @@ static void et131x_isr_handler(struct work_struct *work) /* Handle RXDMA Error Interrupt */ if (status & ET_INTR_RXDMA_ERR) { - /* - * The rxdma_error interrupt is sent when a time-out on a + /* The rxdma_error interrupt is sent when a time-out on a * request issued by the JAGCore has occurred or a completion is * returned with an un-successful status. In both cases the * request is considered complete. The JAGCore will @@ -4276,8 +4221,7 @@ static void et131x_isr_handler(struct work_struct *work) /* Handle the Wake on LAN Event */ if (status & ET_INTR_WOL) { - /* - * This is a secondary interrupt for wake on LAN. The driver + /* This is a secondary interrupt for wake on LAN. The driver * should never see this, if it does, something serious is * wrong. We will TRAP the message when we are in DBG mode, * otherwise we will ignore it. @@ -4289,8 +4233,7 @@ static void et131x_isr_handler(struct work_struct *work) if (status & ET_INTR_TXMAC) { u32 err = readl(&iomem->txmac.err); - /* - * When any of the errors occur and TXMAC generates an + /* When any of the errors occur and TXMAC generates an * interrupt to report these errors, it usually means that * TXMAC has detected an error in the data stream retrieved * from the on-chip Tx Q. All of these errors are catastrophic @@ -4302,20 +4245,18 @@ static void et131x_isr_handler(struct work_struct *work) "TXMAC interrupt, error 0x%08x\n", err); - /* - * If we are debugging, we want to see this error, otherwise we + /* If we are debugging, we want to see this error, otherwise we * just want the device to be reset and continue */ } /* Handle RXMAC Interrupt */ if (status & ET_INTR_RXMAC) { - /* - * These interrupts are catastrophic to the device, what we need + /* These interrupts are catastrophic to the device, what we need * to do is disable the interrupts and set the flag to cause us * to reset so we can solve this issue. */ - /* MP_SET_FLAG( adapter, fMP_ADAPTER_HARDWARE_ERROR); */ + /* MP_SET_FLAG( adapter, FMP_ADAPTER_HARDWARE_ERROR); */ dev_warn(&adapter->pdev->dev, "RXMAC interrupt, error 0x%08x. Requesting reset\n", @@ -4326,16 +4267,14 @@ static void et131x_isr_handler(struct work_struct *work) readl(&iomem->rxmac.ctrl), readl(&iomem->rxmac.rxq_diag)); - /* - * If we are debugging, we want to see this error, otherwise we + /* If we are debugging, we want to see this error, otherwise we * just want the device to be reset and continue */ } /* Handle MAC_STAT Interrupt */ if (status & ET_INTR_MAC_STAT) { - /* - * This means at least one of the un-masked counters in the + /* This means at least one of the un-masked counters in the * MAC_STAT block has rolled over. Use this to maintain the top, * software managed bits of the counter(s). */ @@ -4344,8 +4283,7 @@ static void et131x_isr_handler(struct work_struct *work) /* Handle SLV Timeout Interrupt */ if (status & ET_INTR_SLV_TIMEOUT) { - /* - * This means a timeout has occurred on a read or write request + /* This means a timeout has occurred on a read or write request * to one of the JAGCore registers. The Global Resources block * has terminated the request and on a read request, returned a * "fake" value. The most likely reasons are: Bad Address or the @@ -4356,8 +4294,7 @@ out: et131x_enable_interrupts(adapter); } -/** - * et131x_stats - Return the current device statistics. +/* et131x_stats - Return the current device statistics. * @netdev: device whose stats are being queried * * Returns 0 on success, errno on failure (as defined in errno.h) @@ -4403,8 +4340,7 @@ static struct net_device_stats *et131x_stats(struct net_device *netdev) return stats; } -/** - * et131x_open - Open the device for use. +/* et131x_open - Open the device for use. * @netdev: device to be opened * * Returns 0 on success, errno on failure (as defined in errno.h) @@ -4430,15 +4366,14 @@ static int et131x_open(struct net_device *netdev) return result; } - adapter->flags |= fMP_ADAPTER_INTERRUPT_IN_USE; + adapter->flags |= FMP_ADAPTER_INTERRUPT_IN_USE; et131x_up(netdev); return result; } -/** - * et131x_close - Close the device +/* et131x_close - Close the device * @netdev: device to be closed * * Returns 0 on success, errno on failure (as defined in errno.h) @@ -4449,15 +4384,14 @@ static int et131x_close(struct net_device *netdev) et131x_down(netdev); - adapter->flags &= ~fMP_ADAPTER_INTERRUPT_IN_USE; + adapter->flags &= ~FMP_ADAPTER_INTERRUPT_IN_USE; free_irq(adapter->pdev->irq, netdev); /* Stop the error timer */ return del_timer_sync(&adapter->error_timer); } -/** - * et131x_ioctl - The I/O Control handler for the driver +/* et131x_ioctl - The I/O Control handler for the driver * @netdev: device on which the control request is being made * @reqbuf: a pointer to the IOCTL request buffer * @cmd: the IOCTL command code @@ -4475,8 +4409,7 @@ static int et131x_ioctl(struct net_device *netdev, struct ifreq *reqbuf, return phy_mii_ioctl(adapter->phydev, reqbuf, cmd); } -/** - * et131x_set_packet_filter - Configures the Rx Packet filtering on the device +/* et131x_set_packet_filter - Configures the Rx Packet filtering on the device * @adapter: pointer to our private adapter structure * * FIXME: lot of dups with MAC code @@ -4504,8 +4437,7 @@ static int et131x_set_packet_filter(struct et131x_adapter *adapter) if ((filter & ET131X_PACKET_TYPE_PROMISCUOUS) || filter == 0) pf_ctrl &= ~7; /* Clear filter bits */ else { - /* - * Set us up with Multicast packet filtering. Three cases are + /* Set us up with Multicast packet filtering. Three cases are * possible - (1) we have a multi-cast list, (2) we receive ALL * multicast entries or (3) we receive none. */ @@ -4541,8 +4473,7 @@ static int et131x_set_packet_filter(struct et131x_adapter *adapter) return status; } -/** - * et131x_multicast - The handler to configure multicasting on the interface +/* et131x_multicast - The handler to configure multicasting on the interface * @netdev: a pointer to a net_device struct representing the device */ static void et131x_multicast(struct net_device *netdev) @@ -4611,8 +4542,7 @@ static void et131x_multicast(struct net_device *netdev) spin_unlock_irqrestore(&adapter->lock, flags); } -/** - * et131x_tx - The handler to tx a packet on the device +/* et131x_tx - The handler to tx a packet on the device * @skb: data to be Tx'd * @netdev: device on which data is to be Tx'd * @@ -4644,8 +4574,7 @@ static int et131x_tx(struct sk_buff *skb, struct net_device *netdev) return status; } -/** - * et131x_tx_timeout - Timeout handler +/* et131x_tx_timeout - Timeout handler * @netdev: a pointer to a net_device struct representing the device * * The handler called when a Tx request times out. The timeout period is @@ -4659,17 +4588,17 @@ static void et131x_tx_timeout(struct net_device *netdev) unsigned long flags; /* If the device is closed, ignore the timeout */ - if (~(adapter->flags & fMP_ADAPTER_INTERRUPT_IN_USE)) + if (~(adapter->flags & FMP_ADAPTER_INTERRUPT_IN_USE)) return; /* Any nonrecoverable hardware error? * Checks adapter->flags for any failure in phy reading */ - if (adapter->flags & fMP_ADAPTER_NON_RECOVER_ERROR) + if (adapter->flags & FMP_ADAPTER_NON_RECOVER_ERROR) return; /* Hardware failure? */ - if (adapter->flags & fMP_ADAPTER_HARDWARE_ERROR) { + if (adapter->flags & FMP_ADAPTER_HARDWARE_ERROR) { dev_err(&adapter->pdev->dev, "hardware error - reset\n"); return; } @@ -4703,8 +4632,7 @@ static void et131x_tx_timeout(struct net_device *netdev) spin_unlock_irqrestore(&adapter->tcb_send_qlock, flags); } -/** - * et131x_change_mtu - The handler called to change the MTU for the device +/* et131x_change_mtu - The handler called to change the MTU for the device * @netdev: device whose MTU is to be changed * @new_mtu: the desired MTU * @@ -4754,8 +4682,7 @@ static int et131x_change_mtu(struct net_device *netdev, int new_mtu) return result; } -/** - * et131x_set_mac_addr - handler to change the MAC address for the device +/* et131x_set_mac_addr - handler to change the MAC address for the device * @netdev: device whose MAC is to be changed * @new_mac: the desired MAC address * @@ -4828,8 +4755,7 @@ static const struct net_device_ops et131x_netdev_ops = { .ndo_do_ioctl = et131x_ioctl, }; -/** - * et131x_pci_setup - Perform device initialization +/* et131x_pci_setup - Perform device initialization * @pdev: a pointer to the device's pci_dev structure * @ent: this device's entry in the pci_device_id table * @@ -4963,11 +4889,10 @@ static int et131x_pci_setup(struct pci_dev *pdev, adapter->mii_bus->read = et131x_mdio_read; adapter->mii_bus->write = et131x_mdio_write; adapter->mii_bus->reset = et131x_mdio_reset; - adapter->mii_bus->irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL); - if (!adapter->mii_bus->irq) { - dev_err(&pdev->dev, "mii_bus irq allocation failed\n"); + adapter->mii_bus->irq = kmalloc_array(PHY_MAX_ADDR, sizeof(int), + GFP_KERNEL); + if (!adapter->mii_bus->irq) goto err_mdio_free; - } for (ii = 0; ii < PHY_MAX_ADDR; ii++) adapter->mii_bus->irq[ii] = PHY_POLL; diff --git a/drivers/staging/et131x/et131x.h b/drivers/staging/et131x/et131x.h index 347e63ddde1f..bbe78a703a23 100644 --- a/drivers/staging/et131x/et131x.h +++ b/drivers/staging/et131x/et131x.h @@ -145,6 +145,8 @@ *31: selfclr_disable */ +#define ET_RESET_ALL 0x007F; + /* * SLV Timer reg at address 0x002C (low 24 bits) */ @@ -317,6 +319,14 @@ struct txdma_regs { /* Location: */ * 18-31: unused */ +#define ET_RXDMA_CSR_HALT 0x0001 +#define ET_RXDMA_CSR_FBR0_SIZE_LO 0x0100 +#define ET_RXDMA_CSR_FBR0_SIZE_HI 0x0200 +#define ET_RXDMA_CSR_FBR0_ENABLE 0x0400 +#define ET_RXDMA_CSR_FBR1_SIZE_LO 0x0800 +#define ET_RXDMA_CSR_FBR1_SIZE_HI 0x1000 +#define ET_RXDMA_CSR_FBR1_ENABLE 0x2000 +#define ET_RXDMA_CSR_HALT_STATUS 0x00020000 /* * structure for dma writeback lo reg in rxdma address map @@ -384,6 +394,8 @@ struct txdma_regs { /* Location: */ * 11-0: psr ndes */ +#define ET_RXDMA_PSR_NUM_DES_MASK 0xFFF; + /* * structure for packet status ring available offset reg in rxdma address map * located at address 0x202C @@ -559,6 +571,9 @@ struct rxdma_regs { /* Location: */ * 0: txmac_en */ +#define ET_TX_CTRL_FC_DISABLE 0x0008 +#define ET_TX_CTRL_TXMAC_ENABLE 0x0001 + /* * structure for shadow pointer reg in txmac address map * located at address 0x3004 @@ -674,6 +689,9 @@ struct txmac_regs { /* Location: */ * 0: rxmac_en */ +#define ET_RX_CTRL_WOL_DISABLE 0x0008 +#define ET_RX_CTRL_RXMAC_ENABLE 0x0001 + /* * structure for Wake On Lan Control and CRC 0 reg in rxmac address map * located at address 0x4004 @@ -715,9 +733,9 @@ struct txmac_regs { /* Location: */ * 7-0: sa6 */ -#define ET_WOL_LO_SA3_SHIFT 24 -#define ET_WOL_LO_SA4_SHIFT 16 -#define ET_WOL_LO_SA5_SHIFT 8 +#define ET_RX_WOL_LO_SA3_SHIFT 24 +#define ET_RX_WOL_LO_SA4_SHIFT 16 +#define ET_RX_WOL_LO_SA5_SHIFT 8 /* * structure for Wake On Lan Source Address Hi reg in rxmac address map @@ -728,7 +746,7 @@ struct txmac_regs { /* Location: */ * 7-0: sa2 */ -#define ET_WOL_HI_SA1_SHIFT 8 +#define ET_RX_WOL_HI_SA1_SHIFT 8 /* * structure for Wake On Lan mask reg in rxmac address map @@ -746,9 +764,9 @@ struct txmac_regs { /* Location: */ * 7-0: addr1_6 */ -#define ET_UNI_PF_ADDR1_3_SHIFT 24 -#define ET_UNI_PF_ADDR1_4_SHIFT 16 -#define ET_UNI_PF_ADDR1_5_SHIFT 8 +#define ET_RX_UNI_PF_ADDR1_3_SHIFT 24 +#define ET_RX_UNI_PF_ADDR1_4_SHIFT 16 +#define ET_RX_UNI_PF_ADDR1_5_SHIFT 8 /* * structure for Unicast Paket Filter Address 2 reg in rxmac address map @@ -760,9 +778,9 @@ struct txmac_regs { /* Location: */ * 7-0: addr2_6 */ -#define ET_UNI_PF_ADDR2_3_SHIFT 24 -#define ET_UNI_PF_ADDR2_4_SHIFT 16 -#define ET_UNI_PF_ADDR2_5_SHIFT 8 +#define ET_RX_UNI_PF_ADDR2_3_SHIFT 24 +#define ET_RX_UNI_PF_ADDR2_4_SHIFT 16 +#define ET_RX_UNI_PF_ADDR2_5_SHIFT 8 /* * structure for Unicast Paket Filter Address 1 & 2 reg in rxmac address map @@ -774,10 +792,9 @@ struct txmac_regs { /* Location: */ * 7-0: addr1_2 */ -#define ET_UNI_PF_ADDR2_1_SHIFT 24 -#define ET_UNI_PF_ADDR2_2_SHIFT 16 -#define ET_UNI_PF_ADDR1_1_SHIFT 8 - +#define ET_RX_UNI_PF_ADDR2_1_SHIFT 24 +#define ET_RX_UNI_PF_ADDR2_2_SHIFT 16 +#define ET_RX_UNI_PF_ADDR1_1_SHIFT 8 /* * structure for Multicast Hash reg in rxmac address map @@ -798,6 +815,12 @@ struct txmac_regs { /* Location: */ * 0: filter_broad_en */ +#define ET_RX_PFCTRL_MIN_PKT_SZ_SHIFT 16; +#define ET_RX_PFCTRL_FRAG_FILTER_ENABLE 0x0008; +#define ET_RX_PFCTRL_UNICST_FILTER_ENABLE 0x0004; +#define ET_RX_PFCTRL_MLTCST_FILTER_ENABLE 0x0002; +#define ET_RX_PFCTRL_BRDCST_FILTER_ENABLE 0x0001; + /* * structure for Memory Controller Interface Control Max Segment reg in rxmac * address map. Located at address 0x4088 @@ -808,6 +831,10 @@ struct txmac_regs { /* Location: */ * 0: seg_en */ +#define ET_RX_MCIF_CTRL_MAX_SEG_SIZE_SHIFT 2; +#define ET_RX_MCIF_CTRL_MAX_SEG_FC_ENABLE 0x0002; +#define ET_RX_MCIF_CTRL_MAX_SEG_ENABLE 0x0001; + /* * structure for Memory Controller Interface Water Mark reg in rxmac address * map. Located at address 0x408C @@ -907,7 +934,6 @@ struct rxmac_regs { /* Location: */ /* END OF RXMAC REGISTER ADDRESS MAP */ - /* START OF MAC REGISTER ADDRESS MAP */ /* @@ -932,12 +958,18 @@ struct rxmac_regs { /* Location: */ * 0: tx enable */ -#define CFG1_LOOPBACK 0x00000100 -#define CFG1_RX_FLOW 0x00000020 -#define CFG1_TX_FLOW 0x00000010 -#define CFG1_RX_ENABLE 0x00000004 -#define CFG1_TX_ENABLE 0x00000001 -#define CFG1_WAIT 0x0000000A /* RX & TX syncd */ +#define ET_MAC_CFG1_SOFT_RESET 0x80000000 +#define ET_MAC_CFG1_SIM_RESET 0x40000000 +#define ET_MAC_CFG1_RESET_RXMC 0x00080000 +#define ET_MAC_CFG1_RESET_TXMC 0x00040000 +#define ET_MAC_CFG1_RESET_RXFUNC 0x00020000 +#define ET_MAC_CFG1_RESET_TXFUNC 0x00010000 +#define ET_MAC_CFG1_LOOPBACK 0x00000100 +#define ET_MAC_CFG1_RX_FLOW 0x00000020 +#define ET_MAC_CFG1_TX_FLOW 0x00000010 +#define ET_MAC_CFG1_RX_ENABLE 0x00000004 +#define ET_MAC_CFG1_TX_ENABLE 0x00000001 +#define ET_MAC_CFG1_WAIT 0x0000000A /* RX & TX syncd */ /* * structure for configuration #2 reg in mac address map. @@ -955,6 +987,15 @@ struct rxmac_regs { /* Location: */ * 0: full duplex */ +#define ET_MAC_CFG2_PREAMBLE_SHIFT 12; +#define ET_MAC_CFG2_IFMODE_MASK 0x0300; +#define ET_MAC_CFG2_IFMODE_1000 0x0200; +#define ET_MAC_CFG2_IFMODE_100 0x0100; +#define ET_MAC_CFG2_IFMODE_HUGE_FRAME 0x0020; +#define ET_MAC_CFG2_IFMODE_LEN_CHECK 0x0010; +#define ET_MAC_CFG2_IFMODE_PAD_CRC 0x0004; +#define ET_MAC_CFG2_IFMODE_CRC_ENABLE 0x0002; +#define ET_MAC_CFG2_IFMODE_FULL_DPLX 0x0001; /* * structure for Interpacket gap reg in mac address map. @@ -1009,6 +1050,8 @@ struct rxmac_regs { /* Location: */ * 2-0: mgmt clock reset */ +#define ET_MAC_MIIMGMT_CLK_RST 0x0007 + /* * structure for MII Management Command reg in mac address map. * located at address 0x5024 @@ -1025,7 +1068,7 @@ struct rxmac_regs { /* Location: */ * 4-0: register */ -#define MII_ADDR(phy, reg) ((phy) << 8 | (reg)) +#define ET_MAC_MII_ADDR(phy, reg) ((phy) << 8 | (reg)) /* * structure for MII Management Control reg in mac address map. @@ -1041,6 +1084,8 @@ struct rxmac_regs { /* Location: */ * 15-0: phy control */ +#define ET_MAC_MIIMGMT_STAT_PHYCRTL_MASK 0xFFFF; + /* * structure for MII Management Indicators reg in mac address map. * located at address 0x5034 @@ -1050,8 +1095,8 @@ struct rxmac_regs { /* Location: */ * 0: busy */ -#define MGMT_BUSY 0x00000001 /* busy */ -#define MGMT_WAIT 0x00000005 /* busy | not valid */ +#define ET_MAC_MGMT_BUSY 0x00000001 /* busy */ +#define ET_MAC_MGMT_WAIT 0x00000005 /* busy | not valid */ /* * structure for Interface Control reg in mac address map. @@ -1076,6 +1121,9 @@ struct rxmac_regs { /* Location: */ * 0: enable jabber protection */ +#define ET_MAC_IFCTRL_GHDMODE (1 << 26) +#define ET_MAC_IFCTRL_PHYMODE (1 << 24) + /* * structure for Interface Status reg in mac address map. * located at address 0x503C |