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authorAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>2023-03-09 11:26:17 +0100
committerMatthias Brugger <matthias.bgg@gmail.com>2023-04-02 19:01:40 +0200
commitb427d857a8eae5cd2d22469371c4625c59dfbb2f (patch)
tree4ecf6b5771125e05d73651b23786f79686a09d54 /drivers/soc/mediatek
parent2a0a8d8700ef4f75b1b3e87b3b314b07246b4c27 (diff)
soc: mediatek: mtk-mmsys: Change MT8173 num_resets to 64
The MT8173 SoC has 64 MMSYS resets, split in two contiguous 32-bits registers, MMSYS_SW0_RST_B (0x140) and MMSYS_SW1_RST_B (0x144), as also stated in the downstream kernel for the Amazon Fire TV 2 (Sloane) in the ddp_reg.h header. Please note that managing more than 32 reset bits is supported since commit 2004f8be8483 ("soc: mediatek: mmsys: add mmsys for support 64 reset bits") This commit brings no functional changes. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20230309102618.114157-3-angelogioacchino.delregno@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Diffstat (limited to 'drivers/soc/mediatek')
-rw-r--r--drivers/soc/mediatek/mtk-mmsys.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c
index d5844aff0621..c4eeab99756b 100644
--- a/drivers/soc/mediatek/mtk-mmsys.c
+++ b/drivers/soc/mediatek/mtk-mmsys.c
@@ -56,7 +56,7 @@ static const struct mtk_mmsys_driver_data mt8173_mmsys_driver_data = {
.routes = mt8173_mmsys_routing_table,
.num_routes = ARRAY_SIZE(mt8173_mmsys_routing_table),
.sw0_rst_offset = MT8183_MMSYS_SW0_RST_B,
- .num_resets = 32,
+ .num_resets = 64,
};
static const struct mtk_mmsys_driver_data mt8183_mmsys_driver_data = {