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| author | Alexander Sverdlin <alexander.sverdlin@gmail.com> | 2017-05-22 16:05:22 +0200 |
|---|---|---|
| committer | Vinod Koul <vinod.koul@intel.com> | 2017-05-24 09:52:46 +0530 |
| commit | 0037ae47812b1f431cc602100d1d51f37d77b61e (patch) | |
| tree | 5a6d750d378933e13476acaf7555c4bb7ce3edf1 /drivers/phy/phy-hix5hd2-sata.c | |
| parent | 9a445bbb1607d9f14556a532453dd86d1b7e381e (diff) | |
dmaengine: ep93xx: Always start from BASE0
The current buffer is being reset to zero on device_free_chan_resources()
but not on device_terminate_all(). It could happen that HW is restarted and
expects BASE0 to be used, but the driver is not synchronized and will start
from BASE1. One solution is to reset the buffer explicitly in
m2p_hw_setup().
Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Cc: stable@vger.kernel.org
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'drivers/phy/phy-hix5hd2-sata.c')
0 files changed, 0 insertions, 0 deletions