diff options
| author | Dongdong Liu <liudongdong3@huawei.com> | 2015-12-04 16:32:25 -0600 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2015-12-04 16:32:25 -0600 |
| commit | 1dbe162d53e11665b48a1c122899ffc2c068bef4 (patch) | |
| tree | 9b13509d3fa6afcb6cf3a5d9f70c4ab295bb3a05 /drivers/pci | |
| parent | 99496bd2971fc378226ad4413e5b72c4545714bd (diff) | |
PCI: hisi: Fix hisi_pcie_cfg_read() 32-bit reads
For 32-bit config reads (size == 4), hisi_pcie_cfg_read() returned success
but never filled in the data we read.
Return the register data for 32-bit config reads.
Without this fix, PCI doesn't work at all because enumeration depends on
32-bit config reads. The driver was tested internally, but got broken in
the process of upstreaming, so this fixes the breakage.
Fixes: 500a1d9a43e0 ("PCI: hisi: Add HiSilicon SoC Hip05 PCIe driver")
Signed-off-by: Dongdong Liu <liudongdong3@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Zhou Wang <wangzhou1@hisilicon.com>
Diffstat (limited to 'drivers/pci')
| -rw-r--r-- | drivers/pci/host/pcie-hisi.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/pci/host/pcie-hisi.c b/drivers/pci/host/pcie-hisi.c index 163671a4f798..77f7c669a1b9 100644 --- a/drivers/pci/host/pcie-hisi.c +++ b/drivers/pci/host/pcie-hisi.c @@ -61,7 +61,9 @@ static int hisi_pcie_cfg_read(struct pcie_port *pp, int where, int size, *val = *(u8 __force *) walker; else if (size == 2) *val = *(u16 __force *) walker; - else if (size != 4) + else if (size == 4) + *val = reg_val; + else return PCIBIOS_BAD_REGISTER_NUMBER; return PCIBIOS_SUCCESSFUL; |