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author | Hou Zhiqiang <Zhiqiang.Hou@nxp.com> | 2019-07-05 17:56:51 +0800 |
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committer | Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2019-07-08 12:39:09 +0100 |
commit | 6f7374b871d5e55e772b532fe1c571da0fcc7164 (patch) | |
tree | 65f7b2284f78ae6711956621600a0211df287c2b /drivers/pci/endpoint | |
parent | 7717c7d7da31befa025c4402ac1179356b00012a (diff) |
PCI: mobiveil: Add upper 32-bit CPU base address setup in outbound window
Current code erroneously sets-up only the lower 32-bit CPU base address
in the outbound window, which results in outbound transactions not
working in 64-bit platforms.
Fix it.
Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP driver")
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Reviewed-by: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in>
Diffstat (limited to 'drivers/pci/endpoint')
0 files changed, 0 insertions, 0 deletions