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authorHeiner Kallweit <hkallweit1@gmail.com>2019-05-04 15:20:38 +0200
committerDavid S. Miller <davem@davemloft.net>2019-05-05 10:52:02 -0700
commitd1f5050b4549fbacd3b3e60126b3bb7270ad8dd1 (patch)
tree7f08003dd3e49d01ff13329a7fd390e8c6cf41c0 /drivers/net
parent9cf9b84cc701c791a4d864ae61b673059ea32d04 (diff)
r8169: speed up rtl_loop_wait
When testing I figured out that most operations signal finish even before we trigger the first delay. Seems like PCI(e) access and memory barriers typically add enough latency. Therefore move the first delay after the first check. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/ethernet/realtek/r8169.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c
index ee54648a3c6d..290debbe1f48 100644
--- a/drivers/net/ethernet/realtek/r8169.c
+++ b/drivers/net/ethernet/realtek/r8169.c
@@ -775,9 +775,9 @@ static bool rtl_loop_wait(struct rtl8169_private *tp, const struct rtl_cond *c,
int i;
for (i = 0; i < n; i++) {
- delay(d);
if (c->check(tp) == high)
return true;
+ delay(d);
}
netif_err(tp, drv, tp->dev, "%s == %d (loop: %d, delay: %d).\n",
c->msg, !high, n, d);