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authorPeter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com>2009-06-04 11:10:17 +0000
committerDavid S. Miller <davem@davemloft.net>2009-06-07 05:20:16 -0700
commit1479ad4fbfbc801898dce1ac2d4d44f0c774ecc5 (patch)
tree8e1aebc3767e27175158df762caf4d27e6db4f5a /drivers/net/ixgbe/ixgbe_82599.c
parentbdf0a550c81c293f22bc511e3cd2d0bf1d847d47 (diff)
ixgbe: Change the 82599 PHY DSP restart logic
When reprogramming the 82599 analog PHY to either SFI optical or Direct Attach Twinax, we need to restart the DSP in the PHY. The current method can cause contention with our FW which is managing PHY state, and will cause unexpected link flaps. This patch fixes the DSP restart by issuing an AN_RESTART in the MAC, which will properly propagate the DSP restart to the PHY. This ensures we don't collide with the FW. Signed-off-by: Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ixgbe/ixgbe_82599.c')
-rw-r--r--drivers/net/ixgbe/ixgbe_82599.c7
1 files changed, 3 insertions, 4 deletions
diff --git a/drivers/net/ixgbe/ixgbe_82599.c b/drivers/net/ixgbe/ixgbe_82599.c
index 5d2783081a94..a7611bbf3873 100644
--- a/drivers/net/ixgbe/ixgbe_82599.c
+++ b/drivers/net/ixgbe/ixgbe_82599.c
@@ -122,10 +122,9 @@ s32 ixgbe_setup_sfp_modules_82599(struct ixgbe_hw *hw)
IXGBE_WRITE_FLUSH(hw);
hw->eeprom.ops.read(hw, ++data_offset, &data_value);
}
- /* Now restart DSP */
- IXGBE_WRITE_REG(hw, IXGBE_CORECTL, 0x00000102);
- IXGBE_WRITE_REG(hw, IXGBE_CORECTL, 0x00000b1d);
- IXGBE_WRITE_FLUSH(hw);
+ /* Now restart DSP by setting Restart_AN */
+ IXGBE_WRITE_REG(hw, IXGBE_AUTOC,
+ (IXGBE_READ_REG(hw, IXGBE_AUTOC) | IXGBE_AUTOC_AN_RESTART));
/* Release the semaphore */
ixgbe_release_swfw_sync(hw, IXGBE_GSSR_MAC_CSR_SM);