drm/nouveau/disp/nv50-: simplify definition of overlay channels

Introduces a new method of defining channels available from the display,
common to all channel types, allowing for more flexibility in available
channel types/counts, and reducing the amount of boiler-plate required.

This will be required to support Volta.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

1 files changed, 22 insertions, 1 deletions

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c
index 072c8c0e7096..f02368ffa1c9 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.c
@@ -289,6 +289,15 @@ nv50_disp_root_pioc_new_(const struct nvkm_oclass *oclass,
 }
 
 static int
+nv50_disp_root_child_new_(const struct nvkm_oclass *oclass,
+			  void *argv, u32 argc, struct nvkm_object **pobject)
+{
+	struct nv50_disp *disp = nv50_disp_root(oclass->parent)->disp;
+	const struct nv50_disp_user *user = oclass->priv;
+	return user->ctor(oclass, argv, argc, disp, pobject);
+}
+
+static int
 nv50_disp_root_child_get_(struct nvkm_object *object, int index,
 			  struct nvkm_oclass *sclass)
 {
@@ -310,6 +319,15 @@ nv50_disp_root_child_get_(struct nvkm_object *object, int index,
 		return 0;
 	}
 
+	index -= ARRAY_SIZE(root->func->pioc);
+
+	if (root->func->user[index].ctor) {
+		sclass->base = root->func->user[index].base;
+		sclass->priv = root->func->user + index;
+		sclass->ctor = nv50_disp_root_child_new_;
+		return 0;
+	}
+
 	return -EINVAL;
 }
 
@@ -351,12 +369,15 @@ nv50_disp_root = {
 	.dmac = {
 		&nv50_disp_core_oclass,
 		&nv50_disp_base_oclass,
-		&nv50_disp_ovly_oclass,
 	},
 	.pioc = {
 		&nv50_disp_oimm_oclass,
 		&nv50_disp_curs_oclass,
 	},
+	.user = {
+		{{0,0,NV50_DISP_OVERLAY_CHANNEL_DMA}, nv50_disp_ovly_new },
+		{}
+	},
 };
 
 static int