diff options
author | Mahesh Kumar <mahesh1.kumar@intel.com> | 2018-05-25 08:52:38 -0700 |
---|---|---|
committer | Paulo Zanoni <paulo.r.zanoni@intel.com> | 2018-06-01 16:02:43 -0700 |
commit | c46ef57d2008e5195f086a538550488b49644db7 (patch) | |
tree | 434b83d7b1ed12c804a564990c4cc43b09a3e9d1 /drivers/gpu/drm/i915/intel_ddi.c | |
parent | 95c778daecb5cd5aafcc09ebf1353fdc759b6fd7 (diff) |
drm/i915/icl: fix icl_unmap/map_plls_to_ports
All connectors may not have best_encoder attached, so don't dereference
encoder pointer for each connector.
Fixes: c27e917e2bda ("drm/i915/icl: add basic support for the ICL clocks")
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180525155238.7054-1-lucas.demarchi@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_ddi.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_ddi.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 3b8f12883ca7..c33b19705e39 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -2444,12 +2444,13 @@ void icl_map_plls_to_ports(struct drm_crtc *crtc, for_each_new_connector_in_state(old_state, conn, conn_state, i) { struct intel_encoder *encoder = to_intel_encoder(conn_state->best_encoder); - enum port port = encoder->port; + enum port port; uint32_t val; if (conn_state->crtc != crtc) continue; + port = encoder->port; mutex_lock(&dev_priv->dpll_lock); val = I915_READ(DPCLKA_CFGCR0_ICL); @@ -2481,11 +2482,12 @@ void icl_unmap_plls_to_ports(struct drm_crtc *crtc, for_each_old_connector_in_state(old_state, conn, old_conn_state, i) { struct intel_encoder *encoder = to_intel_encoder(old_conn_state->best_encoder); - enum port port = encoder->port; + enum port port; if (old_conn_state->crtc != crtc) continue; + port = encoder->port; mutex_lock(&dev_priv->dpll_lock); I915_WRITE(DPCLKA_CFGCR0_ICL, I915_READ(DPCLKA_CFGCR0_ICL) | |