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authorMatthew Gerlach <matthew.gerlach@linux.intel.com>2017-03-23 19:34:28 -0500
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2017-04-08 17:45:28 +0200
commitd201cc17a8a31cc6c4f3944988fe9e2f04b021fb (patch)
treec80bb1c56a333e93e48a93a957a7890f8e5d4a16 /drivers/fpga/Makefile
parent42d5ec954719917e2b7a9160fe05d2316eece5bf (diff)
fpga pr ip: Core driver support for Altera Partial Reconfiguration IP.
Adding the core functions necessary for a fpga-mgr driver for the Altera Partial IP component. It is intended for these functions to be used by the various bus implementations like the platform bus or the PCIe bus. Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> Acked-by: Alan Tull <atull@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/fpga/Makefile')
-rw-r--r--drivers/fpga/Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile
index c6f5d740b946..968fd51cb619 100644
--- a/drivers/fpga/Makefile
+++ b/drivers/fpga/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_FPGA_MGR_SOCFPGA_A10) += socfpga-a10.o
obj-$(CONFIG_FPGA_MGR_TS73XX) += ts73xx-fpga.o
obj-$(CONFIG_FPGA_MGR_XILINX_SPI) += xilinx-spi.o
obj-$(CONFIG_FPGA_MGR_ZYNQ_FPGA) += zynq-fpga.o
+obj-$(CONFIG_ALTERA_PR_IP_CORE) += altera-pr-ip-core.o
# FPGA Bridge Drivers
obj-$(CONFIG_FPGA_BRIDGE) += fpga-bridge.o