diff options
| author | Dan Williams <dan.j.williams@intel.com> | 2023-02-14 16:06:10 -0800 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2023-02-14 16:06:10 -0800 |
| commit | a5fcd228ca1db9810ba1ed461c90b6ee933b9daf (patch) | |
| tree | 814f208a81af8e90bff8619e2eed5d167b400dd2 /drivers/cxl/cxlmem.h | |
| parent | 5a6fe61facdb7f830895712b31fb39f544ffc165 (diff) | |
| parent | 6980daaa3ed5959bf4fe2719d96b1da437026b58 (diff) | |
Merge branch 'for-6.3/cxl-rr-emu' into cxl/next
Pick up the CXL DVSEC range register emulation for v6.3, and resolve
conflicts with the cxl_port_probe() split (from for-6.3/cxl-ram-region)
and event handling (from for-6.3/cxl-events).
Diffstat (limited to 'drivers/cxl/cxlmem.h')
| -rw-r--r-- | drivers/cxl/cxlmem.h | 12 |
1 files changed, 0 insertions, 12 deletions
diff --git a/drivers/cxl/cxlmem.h b/drivers/cxl/cxlmem.h index 64ede1a06eaf..c6c560c67a8a 100644 --- a/drivers/cxl/cxlmem.h +++ b/drivers/cxl/cxlmem.h @@ -188,18 +188,6 @@ static inline int cxl_mbox_cmd_rc2errno(struct cxl_mbox_cmd *mbox_cmd) #define CXL_CAPACITY_MULTIPLIER SZ_256M /** - * struct cxl_endpoint_dvsec_info - Cached DVSEC info - * @mem_enabled: cached value of mem_enabled in the DVSEC, PCIE_DEVICE - * @ranges: Number of active HDM ranges this device uses. - * @dvsec_range: cached attributes of the ranges in the DVSEC, PCIE_DEVICE - */ -struct cxl_endpoint_dvsec_info { - bool mem_enabled; - int ranges; - struct range dvsec_range[2]; -}; - -/** * Event Interrupt Policy * * CXL rev 3.0 section 8.2.9.2.4; Table 8-52 |