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author | Yicong Yang <yangyicong@hisilicon.com> | 2024-11-02 18:42:32 +0800 |
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committer | Catalin Marinas <catalin.marinas@arm.com> | 2024-11-05 10:55:55 +0000 |
commit | 926b66e2ebc8c055b9fea3fb3e5f5b67c80e8e7a (patch) | |
tree | 38bd0c2d500aadd342d50f1c8648a6914ee228eb /arch/arm64/include/asm/pgalloc.h | |
parent | aa47dcda2708e571695dae2e3f9537d9a8eb804c (diff) |
arm64: setup: name 'tcr2' register
TCR2_EL1 introduced some additional controls besides TCR_EL1. Currently
only PIE is supported and enabled by writing TCR2_EL1 directly if PIE
detected.
Introduce a named register 'tcr2' just like 'tcr' we've already had.
It'll be initialized to 0 and updated if certain feature detected and
needs to be enabled. Touch the TCR2_EL1 registers at last with the
updated 'tcr2' value if FEAT_TCR2 supported by checking
ID_AA64MMFR3_EL1.TCRX. Then we can extend the support of other features
controlled by TCR2_EL1.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
Link: https://lore.kernel.org/r/20241102104235.62560-3-yangyicong@huawei.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/include/asm/pgalloc.h')
0 files changed, 0 insertions, 0 deletions