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authorDanila Tikhonov <danila@jiaxyga.com>2024-08-18 22:29:05 +0300
committerBjorn Andersson <andersson@kernel.org>2024-10-05 22:06:55 -0500
commit89f324ef54a2aea7d076af47ae801d0eada3a640 (patch)
tree3be9ad9ce8af34149b09c835bcc958df4380d55a /arch/arm64/boot/dts/qcom/sc7280.dtsi
parent4c3d9c134892c4158867075c840b81a5ed28af1f (diff)
arm64: dts: qcom: sc7280: Fix PMU nodes for Cortex A55 and A78
The SC7280, SM7325, and QCM6490 platforms feature an 8-core setup consisting of: - 1x Kryo 670 Prime (Cortex-A78) / Kryo 670 Gold Plus (Cortex-A78) - 3x Kryo 670 Gold (Cortex-A78) - 4x Kryo 670 Silver (Cortex-A55) (The CPU cores in the SC7280 are simply called Kryo, but are nevertheless based on the same Cortex A78 and A55). Use the correct compatibility. Signed-off-by: Danila Tikhonov <danila@jiaxyga.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org> Link: https://lore.kernel.org/r/20240818192905.120477-1-danila@jiaxyga.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/qcom/sc7280.dtsi')
-rw-r--r--arch/arm64/boot/dts/qcom/sc7280.dtsi9
1 files changed, 7 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index fbdc9c19242c..d0706224d1ec 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -845,8 +845,13 @@
};
};
- pmu {
- compatible = "arm,armv8-pmuv3";
+ pmu-a55 {
+ compatible = "arm,cortex-a55-pmu";
+ interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
+ };
+
+ pmu-a78 {
+ compatible = "arm,cortex-a78-pmu";
interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
};