diff options
author | Junhao He <hejunhao3@huawei.com> | 2023-06-15 20:59:26 +0800 |
---|---|---|
committer | Will Deacon <will@kernel.org> | 2023-06-16 12:27:38 +0100 |
commit | ea8d1c062a0e876e999e4f347daeb598d5e677ab (patch) | |
tree | 9aa8b9374d09d17d73a000369b4adb0b8b46b40a /Documentation | |
parent | 312eca95e28d40694aee7c78a18ac0ecfd6d8159 (diff) |
docs: perf: Add new description for HiSilicon UC PMU
A new function is added on HiSilicon uncore UC PMU.
The UC PMU support to filter statistical information based on
the specified tx request uring channel. Make user configuration
through "uring_channel" parameter.
Document them to provide guidance on how to use them.
Signed-off-by: Junhao He <hejunhao3@huawei.com>
Reviewed-by: Jonathan Cameron <Jonthan.Cameron@huawei.com>
Reviewed-by: Yicong Yang <yangyicong@hisilicon.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/20230615125926.29832-4-hejunhao3@huawei.com
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/admin-guide/perf/hisi-pmu.rst | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/Documentation/admin-guide/perf/hisi-pmu.rst b/Documentation/admin-guide/perf/hisi-pmu.rst index 546979360513..939a524fa1d6 100644 --- a/Documentation/admin-guide/perf/hisi-pmu.rst +++ b/Documentation/admin-guide/perf/hisi-pmu.rst @@ -98,6 +98,14 @@ CCL/ICL-ID. For I/O die, the ICL-ID is followed by: 5'b00011: HAC_ICL; 5'b10000: PCIe_ICL; +(e) uring_channel: UC PMU events 0x47~0x59 supports filtering by tx request +uring channel. It is 2 bits. Some important codes are as follows: +2'b11: count the events which sent to the uring_ext (MATA) channel; +2'b01: is the same as 2'b11; +2'b10: count the events which sent to the uring (non-MATA) channel; +2'b00: default value, count the events which sent to the both uring and + uring_ext channel; + Users could configure IDs to count data come from specific CCL/ICL, by setting srcid_cmd & srcid_msk, and data desitined for specific CCL/ICL by setting tgtid_cmd & tgtid_msk. A set bit in srcid_msk/tgtid_msk means the PMU will not |