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authorJon Hunter <jonathanh@nvidia.com>2024-05-08 10:22:07 +0100
committerBjorn Helgaas <bhelgaas@google.com>2024-05-28 11:16:02 -0500
commitd19a86d584e04191cdab7ced24d7ed791075697a (patch)
tree7457c0564eab0e3362e4626a59b1d5dea62a2de4
parent1613e604df0cd359cf2a7fbd9be7a0bcfacfabd0 (diff)
PCI: tegra194: Set EP alignment restriction for inbound ATU
Tegra194 and Tegra234 PCIe EP controllers have 64K alignment restriction for the inbound ATU. Set the endpoint inbound ATU alignment to 64kB in the Tegra194 PCIe driver. Fixes: c57247f940e8 ("PCI: tegra: Add support for PCIe endpoint mode in Tegra194") Suggested-by: Manikanta Maddireddy <mmaddireddy@nvidia.com> Link: https://lore.kernel.org/linux-pci/20240508092207.337063-1-jonathanh@nvidia.com Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Krzysztof WilczyƄski <kwilczynski@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Niklas Cassel <cassel@kernel.org>
-rw-r--r--drivers/pci/controller/dwc/pcie-tegra194.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
index 93f5433c5c55..4537313ef37a 100644
--- a/drivers/pci/controller/dwc/pcie-tegra194.c
+++ b/drivers/pci/controller/dwc/pcie-tegra194.c
@@ -2015,6 +2015,7 @@ static const struct pci_epc_features tegra_pcie_epc_features = {
.bar[BAR_3] = { .type = BAR_RESERVED, },
.bar[BAR_4] = { .type = BAR_RESERVED, },
.bar[BAR_5] = { .type = BAR_RESERVED, },
+ .align = SZ_64K,
};
static const struct pci_epc_features*