diff options
author | Ioana Ciornei <ioana.ciornei@nxp.com> | 2022-07-07 12:14:35 +0300 |
---|---|---|
committer | Jakub Kicinski <kuba@kernel.org> | 2022-07-12 17:27:16 -0700 |
commit | 7ff7c9922859838afa8cff55d6046f698016f19a (patch) | |
tree | 6ecfe57b38b6153fe1a73fa1a02fb2b3be9125a7 | |
parent | 70991f1e68589b2d26b0e0857da3629f4a658a4d (diff) |
dt-bindings: net: sff,sfp: rename example dt nodes to be more generic
Rename the dt nodes shown in the sff,sfp.yaml examples so that they are
generic and not really tied to a specific platform.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
-rw-r--r-- | Documentation/devicetree/bindings/net/sff,sfp.yaml | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/Documentation/devicetree/bindings/net/sff,sfp.yaml b/Documentation/devicetree/bindings/net/sff,sfp.yaml index 19cf88284295..06c66ab81c01 100644 --- a/Documentation/devicetree/bindings/net/sff,sfp.yaml +++ b/Documentation/devicetree/bindings/net/sff,sfp.yaml @@ -89,7 +89,7 @@ examples: - | # Direct serdes to SFP connection #include <dt-bindings/gpio/gpio.h> - sfp_eth3: sfp-eth3 { + sfp1: sfp { compatible = "sff,sfp"; i2c-bus = <&sfp_1g_i2c>; los-gpios = <&cpm_gpio2 22 GPIO_ACTIVE_HIGH>; @@ -101,19 +101,19 @@ examples: tx-fault-gpios = <&cpm_gpio2 19 GPIO_ACTIVE_HIGH>; }; - cps_emac3 { + ethernet { phy-names = "comphy"; phys = <&cps_comphy5 0>; - sfp = <&sfp_eth3>; + sfp = <&sfp1>; }; - | # Serdes to PHY to SFP connection #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/interrupt-controller/arm-gic.h> - sfp_eth0: sfp-eth0 { + sfp2: sfp { compatible = "sff,sfp"; - i2c-bus = <&sfpp0_i2c>; + i2c-bus = <&sfp_i2c>; los-gpios = <&cps_gpio1 28 GPIO_ACTIVE_HIGH>; mod-def0-gpios = <&cps_gpio1 27 GPIO_ACTIVE_LOW>; pinctrl-names = "default"; @@ -126,17 +126,17 @@ examples: #address-cells = <1>; #size-cells = <0>; - p0_phy: ethernet-phy@0 { + phy: ethernet-phy@0 { compatible = "ethernet-phy-ieee802.3-c45"; pinctrl-names = "default"; pinctrl-0 = <&cpm_phy0_pins &cps_phy0_pins>; reg = <0>; interrupt = <&cpm_gpio2 18 IRQ_TYPE_EDGE_FALLING>; - sfp = <&sfp_eth0>; + sfp = <&sfp2>; }; }; - cpm_eth0 { - phy = <&p0_phy>; + ethernet { + phy = <&phy>; phy-mode = "10gbase-kr"; }; |