1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
|
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/arm,komeda.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Arm Komeda display processor
maintainers:
- Liviu Dudau <Liviu.Dudau@arm.com>
- Andre Przywara <andre.przywara@arm.com>
description:
The Arm Mali D71 display processor supports up to two displays with up
to a 4K resolution each. Each pipeline can be composed of up to four
layers. It is typically connected to a digital display connector like HDMI.
properties:
compatible:
oneOf:
- items:
- const: arm,mali-d32
- const: arm,mali-d71
- const: arm,mali-d71
reg:
maxItems: 1
interrupts:
maxItems: 1
clock-names:
const: aclk
clocks:
maxItems: 1
description: The main DPU processor clock
"#address-cells":
const: 1
"#size-cells":
const: 0
memory-region:
maxItems: 1
description:
Phandle to a node describing memory to be used for the framebuffer.
If not present, the framebuffer may be located anywhere in memory.
iommus:
description:
The stream IDs for each of the used pipelines, each four IDs for the
four layers, plus one for the write-back stream.
minItems: 5
maxItems: 10
patternProperties:
'^pipeline@[01]$':
type: object
description:
clocks
properties:
reg:
enum: [ 0, 1 ]
clock-names:
const: pxclk
clocks:
maxItems: 1
description: The input reference for the pixel clock.
port:
$ref: /schemas/graph.yaml#/$defs/port-base
unevaluatedProperties: false
additionalProperties: false
required:
- "#address-cells"
- "#size-cells"
- compatible
- reg
- interrupts
- clock-names
- clocks
- pipeline@0
examples:
- |
display@c00000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "arm,mali-d71";
reg = <0xc00000 0x20000>;
interrupts = <168>;
clocks = <&dpu_aclk>;
clock-names = "aclk";
iommus = <&smmu 0>, <&smmu 1>, <&smmu 2>, <&smmu 3>,
<&smmu 8>,
<&smmu 4>, <&smmu 5>, <&smmu 6>, <&smmu 7>,
<&smmu 9>;
dp0_pipe0: pipeline@0 {
clocks = <&fpgaosc2>;
clock-names = "pxclk";
reg = <0>;
port {
dp0_pipe0_out: endpoint {
remote-endpoint = <&db_dvi0_in>;
};
};
};
dp0_pipe1: pipeline@1 {
clocks = <&fpgaosc2>;
clock-names = "pxclk";
reg = <1>;
port {
dp0_pipe1_out: endpoint {
remote-endpoint = <&db_dvi1_in>;
};
};
};
};
...
|
