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AgeCommit message (Expand)AuthorFilesLines
2010-05-10i7core_edac: Convert UDIMM error counters into a proper sysfs groupMauro Carvalho Chehab1-37/+44
2010-05-10edac: Don't create csrow entries on instance groupsMauro Carvalho Chehab1-2/+2
2010-05-10edac: store/show methods for device groups weren't workingMauro Carvalho Chehab3-9/+88
2010-05-10i7core_edac: Add support for sysfs addrmatch groupMauro Carvalho Chehab1-103/+70
2010-05-10edac_core: Allow the creation of sysfs groupsMauro Carvalho Chehab2-28/+67
2010-05-10i7core_edac: Avoid printing a warning when debug is disabledMauro Carvalho Chehab1-2/+1
2010-05-10i7core_edac: We need to use list_for_each_entry_safe to avoid errorsMauro Carvalho Chehab1-2/+3
2010-05-10i7core_edac: change remove module strategyMauro Carvalho Chehab1-20/+35
2010-05-10i7core_edac: remove static counter for max socketsMauro Carvalho Chehab1-1/+0
2010-05-10i7core_edac: at remove, don't remove all pci devices at onceMauro Carvalho Chehab1-17/+19
2010-05-10i7core_edac: Fix a bug when printing error counts with RDIMMsMauro Carvalho Chehab1-5/+8
2010-05-10i7core_edac: a few fixes for multiple mc'sMauro Carvalho Chehab1-9/+12
2010-05-10i7core_edac: sanity check: print a warning if a mcelog is ignoredMauro Carvalho Chehab1-1/+6
2010-05-10i7core_edac: create one mc per socket/QPIMauro Carvalho Chehab1-279/+228
2010-05-10Dynamically allocate memory for PCI devicesMauro Carvalho Chehab1-61/+114
2010-05-10i7core: temporary workaround to allow it to compile against 2.6.30Mauro Carvalho Chehab1-2/+4
2010-05-10i7core_edac: Improve corrected_error_counts output for RDIMMMauro Carvalho Chehab1-3/+3
2010-05-10i7core_edac: Probe on Xeons earilerKeith Mannthey1-13/+19
2010-05-10i7core: Use registered memories per processorMauro Carvalho Chehab1-16/+23
2010-05-10i7core_edac: Use Device 3 function 2 to report errors with RDIMM'sMauro Carvalho Chehab1-30/+178
2010-05-10i7core_edac: Fix ecc enable shiftKeith Mannthey1-1/+1
2010-05-10i7core_edac: Print an error message if pci register failsMauro Carvalho Chehab1-1/+7
2010-05-10i7core_edac: CodingSyle fixes/cleanupsMauro Carvalho Chehab1-27/+23
2010-05-10i7core_edac: fix error injectionMauro Carvalho Chehab1-15/+12
2010-05-10i7core_edac: fix error codes for sysfs error injection interfaceMauro Carvalho Chehab1-4/+4
2010-05-10i7core_edac: some fixes at error injection codeMauro Carvalho Chehab1-53/+51
2010-05-10i7core_edac: Some cleanups at displayed infoMauro Carvalho Chehab1-12/+9
2010-05-10i7core: remove some uneeded noisy debug messagesMauro Carvalho Chehab1-4/+0
2010-05-10i7core: add socket info at the debug msgMauro Carvalho Chehab1-2/+2
2010-05-10i7core: better document i7core_get_active_channels()Mauro Carvalho Chehab1-1/+17
2010-05-10i7core: fix get_devices routine for Xeon55xxMauro Carvalho Chehab1-78/+108
2010-05-10i7core: enrich error information based on memory transaction typeMauro Carvalho Chehab1-5/+27
2010-05-10i7core: check if the memory error is fatal or non-fatalMauro Carvalho Chehab1-3/+13
2010-05-10i7core: fix probing on Xeon55xxMauro Carvalho Chehab1-3/+20
2010-05-10i7core_edac: some fixes at memory error parserMauro Carvalho Chehab1-8/+14
2010-05-10i7core_edac: decode mcelog error and send it via edac interfaceMauro Carvalho Chehab1-22/+70
2010-05-10i7core_edac: maps all sockets as if ther are one MC controllerMauro Carvalho Chehab1-6/+7
2010-05-10i7core_edac: add support for more than one MC socketMauro Carvalho Chehab1-113/+213
2010-05-10i7core_edac: Add a code to probe Xeon 55xx busMauro Carvalho Chehab1-4/+13
2010-05-10i7core_edac: Adds write unlock to MC registersMauro Carvalho Chehab1-3/+27
2010-05-10i7core_edac: Add edac_mce glueMauro Carvalho Chehab2-6/+116
2010-05-10edac/Kconfig: edac_mce can't be moduleMauro Carvalho Chehab1-1/+1
2010-05-10edac_mce: Add an interface driver to report mce errors via edacMauro Carvalho Chehab3-1/+66
2010-05-10i7core_edac: CodingStyle fixesMauro Carvalho Chehab1-27/+32
2010-05-10i7core_edac: fill csrows edac sysfs infoMauro Carvalho Chehab1-16/+50
2010-05-10i7core_edac: Memory info fixes and preparation for properly filling cswrow dataMauro Carvalho Chehab1-9/+19
2010-05-10i7core_edac: Get more info about the memory DIMMsMauro Carvalho Chehab1-63/+107
2010-05-10i7core_edac: Add more information about each active dimmMauro Carvalho Chehab1-13/+30
2010-05-10i7core_edac: Improve error handlingMauro Carvalho Chehab1-11/+21
2010-05-10i7core_edac: Properly fill struct csrow_infoMauro Carvalho Chehab1-10/+38
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