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path: root/drivers/irqchip/irq-atmel-aic5.c
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2020-06-27irqchip/atmel-aic5: Add support for sam9x60 rtt fixupClaudiu Beznea1-1/+7
Add support for SAM9X60 RTT fixup. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/1591779936-18577-2-git-send-email-claudiu.beznea@microchip.com
2020-03-16irqchip/atmel-aic5: Fix irq_retrigger callback return valueMarc Zyngier1-1/+1
The irq_retrigger callback is supposed to return 0 when retrigger has failed, and a non-zero value otherwise. Tell the core code that the driver has succedded in using the HW to retrigger the interrupt. Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200310184921.23552-3-maz@kernel.org
2019-09-09irqchip/atmel-aic5: Add support for sam9x60 irqchipSandeep Sheriker Mallikarjun1-0/+10
Add support for SAM9X60 irqchip. Signed-off-by: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/1568026835-6646-1-git-send-email-claudiu.beznea@microchip.com [claudiu.beznea@microchip.com: update aic5_irq_fixups[], update documentation]
2017-07-04irqchip/atmel-aic: Remove root argument from ->fixup() prototypeBoris Brezillon1-2/+2
We are no longer using the root argument passed to the ->fixup() hooks. Remove it. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2017-04-12irqchip/atmel-aic5: Handle suspend to RAMAlexandre Belloni1-1/+28
On sama5d2, VDD core may be cut while suspending to RAM. This means the AIC5 registers content is lost. Restore it at resume time. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2016-09-13irqchip/atmel-aic: Fix potential deadlock in ->xlate()Boris Brezillon1-2/+3
aic5_irq_domain_xlate() and aic_irq_domain_xlate() take the generic chip lock without disabling interrupts, which can lead to a deadlock if an interrupt occurs while the lock is held in one of these functions. Replace irq_gc_{lock,unlock}() calls by irq_gc_{lock_irqsave,unlock_irqrestore}() ones to prevent this bug from happening. Fixes: b1479ebb7720 ("irqchip: atmel-aic: Add atmel AIC/AIC5 drivers") Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: stable@vger.kernel.org Cc: Alexandre Belloni <alexandre.belloni@free-electrons.com> Link: http://lkml.kernel.org/r/1473775109-4192-2-git-send-email-boris.brezillon@free-electrons.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2016-02-08irqchip/atmel-aic: Remove duplicate bit operationMilo Kim1-1/+1
AIC5 priority value is updated twice - in aic_common_set_priority() and when updating AT91_AIC5_SMR. Variable, 'smr' has updated priority value (intspec[2]) in the first step, so no need to update it again in the second step. Signed-off-by: Milo Kim <milo.kim@ti.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Ludovic Desroches <ludovic.desroches@atmel.com> Cc: Nicholas Ferre <nicolas.ferre@atmel.com> Link: http://lkml.kernel.org/r/1452669592-3401-4-git-send-email-milo.kim@ti.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2016-02-08irqchip/atmel-aic: Change return type of aic_common_set_priority()Milo Kim1-3/+2
Priority validation is not necessary because aic_common_irq_domain_xlate() already handles it. With this removal, return type can be changed to void. Signed-off-by: Milo Kim <milo.kim@ti.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Ludovic Desroches <ludovic.desroches@atmel.com> Cc: Nicholas Ferre <nicolas.ferre@atmel.com> Link: http://lkml.kernel.org/r/1452669592-3401-3-git-send-email-milo.kim@ti.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2016-02-08irqchip/atmel-aic: Handle aic_common_irq_fixup in aic_common_of_initMilo Kim1-3/+1
AIC IRQ fixup is handled in each IRQ chip driver. It can be moved into aic_common_of_init() before returning the result. Then, aic_common_irq_fixup() can be changed to static type. Signed-off-by: Milo Kim <milo.kim@ti.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Ludovic Desroches <ludovic.desroches@atmel.com> Cc: Nicholas Ferre <nicolas.ferre@atmel.com> Link: http://lkml.kernel.org/r/1452669592-3401-1-git-send-email-milo.kim@ti.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-09-22irqchip/atmel-aic5: Simplify base chip selectionLudovic Desroches1-18/+10
Use irq_get_domain_generic_chip() to select the base chip. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Acked-by: Nicholas Ferre <nicolas.ferre@atmel.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Cc: <sasha.levin@oracle.com> Cc: <linux-arm-kernel@lists.infradead.org> Cc: <alexandre.belloni@free-electrons.com> Cc: <Wenyou.Yang@atmel.com> Cc: <jason@lakedaemon.net> Cc: <marc.zyngier@arm.com> Link: http://lkml.kernel.org/r/1442843173-2390-3-git-send-email-ludovic.desroches@atmel.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-09-22irqchip/atmel-aic5: Use explicit variable name for the base chipLudovic Desroches1-22/+22
To avoid errors, use an explicit variable name when accessing the 'base' generic chip. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Acked-by: Nicholas Ferre <nicolas.ferre@atmel.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Cc: <sasha.levin@oracle.com> Cc: <linux-arm-kernel@lists.infradead.org> Cc: <alexandre.belloni@free-electrons.com> Cc: <Wenyou.Yang@atmel.com> Cc: <jason@lakedaemon.net> Cc: <marc.zyngier@arm.com> Link: http://lkml.kernel.org/r/1442843173-2390-2-git-send-email-ludovic.desroches@atmel.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-09-22irqchip/atmel-aic5: Use per chip mask caches in mask/unmask()Ludovic Desroches1-8/+16
When masking/unmasking interrupts, mask_cache is updated and used later for suspend/resume. Unfortunately, it always was the mask_cache associated with the first irq chip which was updated. So when performing resume, only irqs 0-31 could be enabled. Fixes: b1479ebb7720 ("irqchip: atmel-aic: Add atmel AIC/AIC5 drivers") Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Cc: <sasha.levin@oracle.com> Cc: <linux-arm-kernel@lists.infradead.org> Cc: <nicolas.ferre@atmel.com> Cc: <alexandre.belloni@free-electrons.com> Cc: <boris.brezillon@free-electrons.com> Cc: <Wenyou.Yang@atmel.com> Cc: <jason@lakedaemon.net> Cc: <marc.zyngier@arm.com> Cc: stable@vger.kernel.org #3.18 Link: http://lkml.kernel.org/r/1442843173-2390-1-git-send-email-ludovic.desroches@atmel.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-07-27irqchip: Appropriate __init annotation for const dataNicolas Pitre1-1/+1
Init data marked const should be annotated with __initconst for correctness and not __initdata. And for those already __initconst, they should be qualified as const at the compiler level too. This also fixes LTO builds that otherwise fail with section mismatch errors. Signed-off-by: Nicolas Pitre <nico@linaro.org> Cc: Jason Cooper <jason@lakedaemon.net> Link: http://lkml.kernel.org/r/alpine.LFD.2.20.1507241511551.1806@knanqh.ubzr Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-07-11irqchip: Prepare for local stub header removalJoel Porquet1-1/+1
The IRQCHIP_DECLARE macro moved to to 'include/linux/irqchip.h', so the local irqchip.h became an empty shell, which solely includes include/linux/irqchip.h Include the global header in all irqchip drivers instead of the local header, so we can remove it. Signed-off-by: Joel Porquet <joel@porquet.org> Cc: vgupta@synopsys.com Cc: monstr@monstr.eu Cc: ralf@linux-mips.org Cc: jason@lakedaemon.net Link: http://lkml.kernel.org/r/1882096.X39jVG8e0D@joel-zenbook Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-06-18irqchip: atmel-aic5: Add sama5d2 supportNicolas Ferre1-0/+9
Add sama5d2 support to irq-atmel-aic5. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Boris BREZILLON <boris.brezillon@free-electrons.com> Cc: Alexandre Belloni <alexandre.belloni@free-electrons.com> Cc: Ludovic Desroches <ludovic.desroches@atmel.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: <linux-arm-kernel@lists.infradead.org> Link: http://lkml.kernel.org/r/1434632855-27272-1-git-send-email-nicolas.ferre@atmel.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2014-11-09genirq: Generic chip: Change irq_reg_{readl,writel} argumentsKevin Cernekee1-34/+31
Pass in the irq_chip_generic struct so we can use different readl/writel settings for each irqchip driver, when appropriate. Compute (gc->reg_base + reg_offset) in the helper function because this is pretty much what all callers want to do anyway. Compile-tested using the following configurations: at91_dt_defconfig (CONFIG_ATMEL_AIC_IRQ=y) sama5_defconfig (CONFIG_ATMEL_AIC5_IRQ=y) sunxi_defconfig (CONFIG_ARCH_SUNXI=y) tb10x (ARC) is untested. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Acked-by: Arnd Bergmann <arnd@arndb.de> Link: https://lkml.kernel.org/r/1415342669-30640-3-git-send-email-cernekee@gmail.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-10-02Merge branch 'irqchip/atmel' into irqchip/coreJason Cooper1-1/+11
2014-09-14irqchip: atmel-aic5: Add sama5d4 supportAlexandre Belloni1-0/+10
Add sama5d4 support to irq-atmel-aic5. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Link: https://lkml.kernel.org/r/1410536587-24607-2-git-send-email-alexandre.belloni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-09-14irqchip: atmel-aic5: The sama5d3 has 48 IRQsAlexandre Belloni1-1/+1
The FUSE and RAM controllers don't have any connected IRQs, reducing the number of IRQs to 48. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Link: https://lkml.kernel.org/r/1410446511-29477-1-git-send-email-alexandre.belloni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-09-03irqchip: atmel-aic5: Convert to handle_domain_irqMarc Zyngier1-3/+1
Use the new handle_domain_irq method to handle interrupts. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Link: https://lkml.kernel.org/r/1409047421-27649-21-git-send-email-marc.zyngier@arm.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-07-17irqchip: atmel-aic: Define irq fixups for atmel SoCsBoris BREZILLON1-0/+12
Define SoCs that need irq fixups before enabling the AIC irqchip. At the moment we're only fixing irq generated by the RTC block, but other fixups will be added later on. Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Link: https://lkml.kernel.org/r/1405016741-2407-4-git-send-email-boris.brezillon@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-07-17irqchip: atmel-aic: Add atmel AIC/AIC5 driversBoris BREZILLON1-0/+341
Add AIC (Advanced Interrupt Controller) and AIC5 (AIC5 is an evolution of the AIC block) drivers. Put common code in irq-atmel-aic-common.c/.h so that both driver can access shared functions (this will ease maintenance). These drivers are only compatible with dt enabled board and replace the old implementation found in arch/arm/mach-at91/irq.c. Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Link: https://lkml.kernel.org/r/1405012462-766-4-git-send-email-boris.brezillon@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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