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path: root/drivers/gpu/drm/i915/intel_crt.c
AgeCommit message (Expand)AuthorFilesLines
2017-01-25drm/i915: Don't leak edid in intel_crt_detect_ddc()Ander Conselvan de Oliveira1-4/+5
2016-11-17drm/i915: Assorted INTEL_INFO(dev) cleanupsTvrtko Ursulin1-9/+6
2016-11-11drm/i915: More assorted dev_priv cleanupsTvrtko Ursulin1-4/+4
2016-11-01drm/i915: Pass dev_priv to intel_wait_for_vblank()Ville Syrjälä1-1/+1
2016-10-14drm/i915: Make IS_GEN macros only take dev_privTvrtko Ursulin1-3/+3
2016-10-14drm/i915: Make IS_VALLEYVIEW only take dev_privTvrtko Ursulin1-3/+3
2016-10-14drm/i915: Make IS_G4X only take dev_privTvrtko Ursulin1-1/+1
2016-10-14drm/i915: Make INTEL_DEVID only take dev_privTvrtko Ursulin1-2/+2
2016-10-14drm/i915: Make INTEL_PCH_TYPE & co only take dev_privTvrtko Ursulin1-12/+13
2016-10-14drm/i915: Make HAS_DDI and HAS_PCH_LPT_LP only take dev_privTvrtko Ursulin1-5/+5
2016-10-06drm/i915: Add spurious CRT DMI match for Intel DZ77BH-55KVille Syrjälä1-0/+8
2016-10-06drm/i915: Register shadow VGA even when it produces spurious detection resultsVille Syrjälä1-23/+24
2016-10-06Revert "Skip intel_crt_init for Dell XPS 8700"Ville Syrjälä1-8/+0
2016-09-21drm/i915: Store port enum in intel_encoderPandiyan, Dhinakaran1-0/+2
2016-08-24drm/i915: Cleanup crt disable sequence on hsw+Maarten Lankhorst1-0/+15
2016-08-23drm/i915: Convert intel_crt to use atomic stateMaarten Lankhorst1-5/+7
2016-08-23drm/i915: Make encoder->compute_config take the connector stateMaarten Lankhorst1-1/+2
2016-08-23drm/i915: Pass crtc_state and connector_state to encoder functionsMaarten Lankhorst1-5/+13
2016-07-14drm/i915/vlv: Disable HPD in valleyview_crt_detect_hotplug()Lyude1-0/+18
2016-07-14drm/i915/vlv: Reset the ADPA in vlv_display_power_well_init()Lyude1-1/+1
2016-07-14drm/i915/vlv: Make intel_crt_reset() per-encoderLyude1-5/+5
2016-07-04drm/i915: Mass convert dev->dev_private to to_i915(dev)Chris Wilson1-12/+12
2016-06-30drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()Chris Wilson1-3/+3
2016-06-30drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()Chris Wilson1-2/+4
2016-06-30drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()Chris Wilson1-2/+4
2016-06-24drm/i915: Move connector registration to driver registrationChris Wilson1-2/+0
2016-06-24drm/i915: Move backlight registration to connector registrationChris Wilson1-0/+1
2016-06-19drm/i915: Move intel_connector->unregister to connector->early_unregisterChris Wilson1-1/+1
2016-06-10drm: i915: Rely on the default ->best_encoder() behavior where appropriateBoris Brezillon1-1/+0
2016-05-30drm/i915: Give encoders useful namesVille Syrjälä1-1/+1
2016-05-04drm/i915: Bail out of pipe config compute loop on LPTDaniel Vetter1-1/+7
2016-03-09drm/i915: Move HSW/BDW pll selection logic to intel_dpll_mgr.cAnder Conselvan de Oliveira1-7/+1
2016-03-02drm/i915: Do not return unknown status when load detection is tested.Maarten Lankhorst1-0/+2
2016-03-01drm/i915: Try to fix CRT port clock limitsVille Syrjälä1-4/+12
2016-03-01drm/i915: Read out VGA dotclock properly on LPTVille Syrjälä1-0/+4
2016-03-01drm/i915: Move the encoder vs. FDI dotclock check out from encoder .get_config()Ville Syrjälä1-9/+1
2016-02-18drm/i915: Use correct dpms for intel_enable_crt.Maarten Lankhorst1-3/+1
2016-02-18drm/i915: Use atomic state for load detect in crt.Maarten Lankhorst1-3/+3
2016-02-17drm/i915/crt: Ensure the HW is powered during HW state readoutImre Deak1-3/+10
2016-02-11drm/i915: CRT pixel clock checkMika Kahola1-0/+4
2015-12-23Merge tag 'drm-intel-next-2015-12-18' of git://anongit.freedesktop.org/drm-in...Dave Airlie1-1/+1
2015-12-15Merge tag 'drm-intel-next-2015-12-04-1' of git://anongit.freedesktop.org/drm-...Dave Airlie1-6/+27
2015-12-11drm: Pass 'name' to drm_encoder_init()Ville Syrjälä1-1/+1
2015-12-08drm/i915: Disable FDI after the CRT port on LPT-HVille Syrjälä1-1/+1
2015-11-24drm/i915: Don't register CRT connector when it's fused offVille Syrjälä1-6/+27
2015-11-23Merge tag 'v4.4-rc2' into drm-intel-next-queueddrm-intel-next-2015-11-20-mergedDaniel Vetter1-27/+4
2015-11-18drm/i915: Type safe register read/writeVille Syrjälä1-9/+5
2015-11-18drm/i915: Consider SPLL as another shared pll, v2.Maarten Lankhorst1-27/+4
2015-09-30drm/i915: s/_FDI_RXA_.../FDI_RX_...(PIPE_A)/Ville Syrjälä1-1/+1
2015-09-30drm/i915: Constify adjusted_modeVille Syrjälä1-1/+1
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