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path: root/arch/x86/mm/tlb.c
AgeCommit message (Expand)AuthorFilesLines
2020-10-07x86/platform/uv: Remove UV BAU TLB Shootdown HandlerMike Travis1-24/+0
2020-08-26cpuidle: Make CPUIDLE_FLAG_TLB_FLUSHED genericPeter Zijlstra1-11/+2
2020-06-05Merge tag 'x86-mm-2020-06-05' of git://git.kernel.org/pub/scm/linux/kernel/gi...Linus Torvalds1-6/+378
2020-06-02x86/mm: remove vmalloc faultingJoerg Roedel1-37/+0
2020-04-26x86/tlb: Move PCID helpers where they are usedThomas Gleixner1-0/+120
2020-04-26x86/tlb: Uninline nmi_uaccess_okay()Thomas Gleixner1-0/+32
2020-04-26x86/tlb: Move __flush_tlb_all() out of lineThomas Gleixner1-7/+22
2020-04-26x86/tlb: Move flush_tlb_others() out of lineThomas Gleixner1-2/+9
2020-04-26x86/tlb: Move __flush_tlb_one_kernel() out of lineThomas Gleixner1-1/+33
2020-04-26x86/tlb: Move __flush_tlb_one_user() out of lineThomas Gleixner1-1/+55
2020-04-26x86/tlb: Move __flush_tlb_global() out of lineThomas Gleixner1-0/+41
2020-04-26x86/tlb: Move __flush_tlb() out of lineThomas Gleixner1-1/+32
2020-04-24x86/cr4: Sanitize CR4.PCE updateThomas Gleixner1-1/+21
2020-04-24x86/tlb: Uninline __get_current_cr3_fast()Thomas Gleixner1-0/+20
2020-01-24smp: Remove allocation mask from on_each_cpu_cond.*()Sebastian Andrzej Siewior1-1/+1
2019-07-24x86/mm: Avoid redundant interrupt disable in load_mm_cr4()Jan Kiszka1-1/+1
2019-06-14Merge tag 'v5.2-rc4' into mauroJonathan Corbet1-0/+1
2019-06-08docs: fix broken documentation linksMauro Carvalho Chehab1-1/+1
2019-05-21treewide: Add SPDX license identifier for missed filesThomas Gleixner1-0/+1
2019-04-26x86/mm/tlb: Remove 'struct flush_tlb_info' from the stackNadav Amit1-34/+82
2019-04-16x86/mm/tlb: Revert "x86/mm: Align TLB invalidation info"Peter Zijlstra1-1/+1
2019-01-29x86/mm/tlb: Remove unused cpu variableShaokun Zhang1-3/+0
2018-12-17x86/mm/cpa: Optimize cpa_flush_array() TLB invalidationPeter Zijlstra1-1/+3
2018-11-28x86/speculation: Prepare for conditional IBPB in switch_mm()Thomas Gleixner1-29/+86
2018-10-23Merge branch 'x86-pti-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...Linus Torvalds1-11/+20
2018-10-09x86/mm/tlb: Make lazy TLB mode lazierRik van Riel1-9/+58
2018-10-09x86/mm/tlb: Add freed_tables element to flush_tlb_infoRik van Riel1-0/+1
2018-10-09x86/mm/tlb: Add freed_tables argument to flush_tlb_mm_rangeRik van Riel1-1/+2
2018-10-09x86/mm/tlb: Restructure switch_mm_irqs_off()Rik van Riel1-33/+33
2018-10-09x86/mm/tlb: Always use lazy TLB modeRik van Riel1-14/+1
2018-10-09x86/mm: Page size aware flush_tlb_mm_range()Peter Zijlstra1-9/+8
2018-09-26x86/speculation: Apply IBPB more strictly to avoid cross-process data leakJiri Kosina1-11/+20
2018-08-31x86/nmi: Fix NMI uaccess race against CR3 switchingAndy Lutomirski1-0/+7
2018-08-22x86/mm/tlb: Revert the recent lazy TLB patchesPeter Zijlstra1-152/+53
2018-07-24x86/mm/tlb: Make clear_asid_other() staticzhong jiang1-1/+1
2018-07-17x86/mm/tlb: Skip atomic operations for 'init_mm' in switch_mm_irqs_off()Rik van Riel1-5/+12
2018-07-17x86/mm/tlb: Always use lazy TLB modeRik van Riel1-14/+1
2018-07-17x86/mm/tlb: Only send page table free TLB flush to lazy TLB CPUsRik van Riel1-4/+39
2018-07-17x86/mm/tlb: Make lazy TLB mode lazierRik van Riel1-9/+59
2018-07-17x86/mm/tlb: Restructure switch_mm_irqs_off()Rik van Riel1-30/+30
2018-07-17x86/mm/tlb: Leave lazy TLB mode at page table free timeRik van Riel1-0/+27
2018-05-19x86/mm: Stop pretending pgtable_l5_enabled is a variableKirill A. Shutemov1-1/+1
2018-02-26Merge tag 'v4.16-rc3' into x86/mm, to pick up fixesIngo Molnar1-3/+3
2018-02-16x86/mm: Replace compile-time checks for 5-level paging with runtime-time checksKirill A. Shutemov1-1/+1
2018-02-14Merge branch 'x86-pti-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...Linus Torvalds1-3/+3
2018-02-15x86/mm: Rename flush_tlb_single() and flush_tlb_one() to __flush_tlb_one_[use...Andy Lutomirski1-3/+3
2018-02-13x86/mm: Align TLB invalidation infoNadav Amit1-1/+1
2018-02-06Merge branch 'linus' into sched/urgent, to resolve conflictsIngo Molnar1-1/+32
2018-02-05membarrier/x86: Provide core serializing commandMathieu Desnoyers1-3/+4
2018-02-05membarrier: Document scheduler barrier requirementsMathieu Desnoyers1-0/+5
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