drm-intel - Linux driver for Intel graphics

Age	Commit message (Expand)	Author	Files	Lines
2018-10-22	RISC-V: Add logical CPU indexing for RISC-V	Atish Patra	2	-0/+23
2018-10-22	RISC-V: Use WRITE_ONCE instead of direct access	Atish Patra	1	-2/+3
2018-10-22	RISC-V: Use mmgrab()	Palmer Dabbelt	1	-1/+2
2018-10-22	RISC-V: Rename im_okay_therefore_i_am to found_boot_cpu	Palmer Dabbelt	1	-4/+5
2018-10-22	RISC-V: Rename riscv_of_processor_hart to riscv_of_processor_hartid	Palmer Dabbelt	2	-3/+6
2018-10-22	RISC-V: Disable preemption before enabling interrupts	Atish Patra	1	-1/+5
2018-10-22	RISC-V: Comment on the TLB flush in smp_callin()	Palmer Dabbelt	1	-0/+4
2018-10-22	RISC-V: Filter ISA and MMU values in cpuinfo	Palmer Dabbelt	1	-7/+61
2018-10-22	RISC-V: Don't set cacheinfo.{physical_line_partition,attributes}	Palmer Dabbelt	1	-7/+0
2018-10-22	RISC-V: No need to pass scause as arg to do_IRQ()	Anup Patel	2	-3/+2
2018-10-02	RISCV: Fix end PFN for low memory	Atish Patra	1	-1/+1
2018-09-04	riscv: Do not overwrite initrd_start and initrd_end	Guenter Roeck	1	-7/+0
2018-08-28	RISC-V: Use a less ugly workaround for unused variable warnings	Palmer Dabbelt	1	-14/+1
2018-08-20	RISC-V: Define sys_riscv_flush_icache when SMP=n	Palmer Dabbelt	1	-2/+10
2018-08-13	RISC-V: Fix !CONFIG_SMP compilation error	Atish Patra	1	-1/+0
2018-08-13	RISC-V: Add the directive for alignment of stvec's value	Zong Li	1	-0/+2
2018-08-13	clocksource: new RISC-V SBI timer driver	Palmer Dabbelt	3	-9/+4
2018-08-13	RISC-V: implement low-level interrupt handling	Christoph Hellwig	2	-11/+45
2018-08-13	RISC-V: simplify software interrupt / IPI code	Christoph Hellwig	1	-4/+2
2018-08-13	RISC-V: remove timer leftovers	Christoph Hellwig	1	-21/+0
2018-08-13	RISC-V: Add early printk support via the SBI console	Palmer Dabbelt	1	-0/+27
2018-08-13	RISC-V: Don't increment sepc after breakpoint.	Jim Wilson	1	-1/+0
2018-08-13	RISC-V: Use KBUILD_CFLAGS instead of KCFLAGS when building the vDSO	Palmer Dabbelt	1	-2/+2
2018-07-04	RISC-V: Fix the rv32i kernel build	Palmer Dabbelt	1	-11/+11
2018-07-04	RISC-V: Fix PTRACE_SETREGSET bug.	Jim Wilson	1	-1/+1
2018-07-04	RISC-V: Don't include irq-riscv-intc.h	Palmer Dabbelt	1	-4/+0
2018-07-04	riscv: remove unnecessary of_platform_populate call	Rob Herring	1	-5/+0
2018-07-04	RISC-V: fix R_RISCV_ADD32/R_RISCV_SUB32 relocations	Andreas Schwab	1	-2/+2
2018-07-04	RISC-V: Change variable type for 32-bit compatible	Zong Li	1	-11/+11
2018-06-16	Merge tag 'riscv-for-linus-4.18-merge_window' of git://git.kernel.org/pub/scm...	Linus Torvalds	6	-3/+503
2018-06-11	RISC-V: Make our port sparse-clean	Palmer Dabbelt	2	-2/+3
2018-06-11	RISC-V: Handle R_RISCV_32 in modules	Andreas Schwab	1	-0/+12
2018-06-11	riscv/ftrace: Export _mcount when DYNAMIC_FTRACE isn't set	Alan Kao	1	-1/+1
2018-06-09	riscv: split the declaration of __copy_user	Luc Van Oostenryck	1	-1/+2
2018-06-08	Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/a...	Linus Torvalds	1	-1/+0
2018-06-07	riscv: no __user for probe_kernel_address()	Luc Van Oostenryck	1	-1/+1
2018-06-04	Merge branch 'siginfo-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...	Linus Torvalds	1	-14/+2
2018-06-04	perf: riscv: preliminary RISC-V support	Alan Kao	2	-0/+487
2018-05-19	riscv: add swiotlb support	Christoph Hellwig	1	-0/+2
2018-05-17	drivers: base: cacheinfo: setup DT cache properties early	Jeremy Linton	1	-1/+0
2018-04-25	signal/riscv: Replace do_trap_siginfo with force_sig_fault	Eric W. Biederman	1	-8/+2
2018-04-25	signal/riscv: Use force_sig_fault where appropriate	Eric W. Biederman	1	-8/+1
2018-04-25	signal: Ensure every siginfo we send has all bits initialized	Eric W. Biederman	1	-0/+1
2018-04-24	RISC-V: build vdso-dummy.o with -no-pie	Aurelien Jarno	1	-1/+1
2018-04-04	Merge tag 'riscv-for-linus-4.17-mw0' of git://git.kernel.org/pub/scm/linux/ke...	Linus Torvalds	8	-19/+772
2018-04-04	Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kerne...	Linus Torvalds	2	-17/+3
2018-04-02	RISC-V: Fixes to module loading	Palmer Dabbelt	4	-6/+338
2018-04-02	RISC-V: Support SUB32 relocation type in kernel module	Zong Li	1	-0/+8
2018-04-02	RISC-V: Support ADD32 relocation type in kernel module	Zong Li	1	-0/+8
2018-04-02	RISC-V: Support ALIGN relocation type in kernel module	Zong Li	1	-0/+10