drm-intel - Linux driver for Intel graphics

Age	Commit message (Expand)	Author	Files	Lines
2015-01-16	MIPS: smp-mt,smp-cmp: Enable all HW IRQs on secondary CPUs	James Hogan	1	-1/+2
2014-11-24	MIPS: Move gic.h to include/linux/irqchip/mips-gic.h	Andrew Bresticker	1	-1/+1
2014-11-24	MIPS: Move GIC to drivers/irqchip/	Andrew Bresticker	1	-2/+2
2014-08-01	MIPS: smp-mt: Fix link error when PROC_FS=n	James Hogan	1	-0/+2
2014-05-27	MIPS: SMP: Remove plat_smp_ops cpus_done method.	Ralf Baechle	1	-5/+0
2014-03-31	MIPS: smp-mt: Use common GIC IPI implementation	Paul Burton	1	-22/+1
2014-03-31	MIPS: MT: proc: Add support for printing VPE and TC ids	Ralf Baechle	1	-0/+22
2014-01-22	MIPS: GIC: Send IPIs using the GIC	Steven J. Hill	1	-0/+27
2014-01-22	MIPS: MT: Mark existing TCs as present	Markos Chandras	1	-0/+1
2013-07-14	MIPS: Delete __cpuinit/__CPUINIT usage from MIPS code	Paul Gortmaker	1	-3/+3
2013-05-09	MIPS: Move 'gic_present' to common location.	Steven J. Hill	1	-2/+1
2013-02-01	MIPS: Whitespace cleanup.	Ralf Baechle	1	-2/+2
2012-08-22	MIPS: Fix build error for non-malta VSMP kernel	Anoop P A	1	-0/+2
2012-03-28	Disintegrate asm/system.h for MIPS	David Howells	1	-1/+0
2011-07-26	atomic: use <linux/atomic.h>	Arun Sharma	1	-1/+1
2011-03-31	Fix common misspellings	Lucas De Marchi	1	-1/+1
2010-12-16	MIPS: MT: Fix typo in comment.	Ralf Baechle	1	-1/+1
2009-09-24	cpumask: Use accessors for cpu_*_mask: mips	Rusty Russell	1	-1/+1
2009-09-24	cpumask: arch_send_call_function_ipi_mask: mips	Rusty Russell	1	-2/+2
2008-12-13	cpumask: centralize cpu_online_map and cpu_possible_map	Rusty Russell	1	-1/+1
2008-04-28	[MIPS] Add support for MIPS CMP platform.	Ralf Baechle	1	-81/+15
2008-04-28	[MIPS] Remove TLB sanitation code	Chris Dearman	1	-47/+0
2008-01-29	[MIPS] SMP: Call platform methods via ops structure.	Ralf Baechle	1	-87/+106
2008-01-29	[MIPS] MT: Scheduler support for SMT	Ralf Baechle	1	-1/+5
2007-10-11	[MIPS] Fix "no space between function name and open parenthesis" warnings.	Ralf Baechle	1	-1/+1
2007-08-27	[MIPS] SMP: Scatter __cpuinit over the code as needed.	Ralf Baechle	1	-3/+3
2007-07-04	[MIPS] VSMP: Fix initialization ordering bug.	Ralf Baechle	1	-2/+2
2007-06-14	[MIPS] Separate performance counter interrupts	Chris Dearman	1	-6/+6
2007-02-06	[MIPS] Define MIPS_CPU_IRQ_BASE in generic header	Atsushi Nemoto	1	-5/+4
2006-11-30	[MIPS] use generic_handle_irq, handle_level_irq, handle_percpu_irq	Atsushi Nemoto	1	-0/+2
2006-10-31	[MIPS] VSMP: Synchronize cp0 counters on bootup.	Ralf Baechle	1	-0/+2
2006-10-31	[MIPS] VSMP: Fix initialization ordering bug.	Ralf Baechle	1	-69/+83
2006-10-08	[MIPS] Complete fixes after removal of pt_regs argument to int handlers.	Ralf Baechle	1	-8/+8
2006-09-27	[MIPS] MT: Initialise all writable bits in Cause register to zero.	Chris Dearman	1	-1/+1
2006-07-02	[PATCH] irq-flags: MIPS: Use the new IRQF_ constants	Thomas Gleixner	1	-2/+2
2006-04-19	[MIPS] FPU affinity for MT ASE.	Ralf Baechle	1	-0/+11
2006-04-19	[MIPS] MT: Improved multithreading support.	Ralf Baechle	1	-0/+349