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authorDouglas Anderson <dianders@chromium.org>2020-06-29 16:41:06 -0700
committerMark Brown <broonie@kernel.org>2020-07-01 23:21:27 +0100
commitd40f0b6f2e21f2400ae8b1b120d11877d9ffd8ec (patch)
tree9e432dc9661057129f940fa1fd9bb3622a0fc3eb /fs/binfmt_elf_fdpic.c
parentdd67de8c3b421376b4b6dac14263763aa75535fc (diff)
spi: Avoid setting the chip select if we don't need to
On some SPI controllers (like spi-geni-qcom) setting the chip select is a heavy operation. For instance on spi-geni-qcom, with the current code, is was measured as taking upwards of 20 us. Even on SPI controllers that aren't as heavy, setting the chip select is at least something like a MMIO operation over some peripheral bus which isn't as fast as a RAM access. While it would be good to find ways to mitigate problems like this in the drivers for those SPI controllers, it can also be noted that the SPI framework could also help out. Specifically, in some situations, we can see the SPI framework calling the driver's set_cs() with the same parameter several times in a row. This is specifically observed when looking at the way the Chrome OS EC SPI driver (cros_ec_spi) works but other drivers likely trip it to some extent. Let's solve this by caching the chip select state in the core and only calling into the controller if there was a change. We check not only the "enable" state but also the chip select mode (active high or active low) since controllers may care about both the mode and the enable flag in their callback. Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20200629164103.1.Ied8e8ad8bbb2df7f947e3bc5ea1c315e041785a2@changeid Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'fs/binfmt_elf_fdpic.c')
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