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authorBen Skeggs <bskeggs@redhat.com>2020-06-22 16:29:45 +1000
committerBen Skeggs <bskeggs@redhat.com>2020-07-24 18:51:04 +1000
commite767835a52cd6d427a4ab6941118e530cbfa638c (patch)
tree489b930e599901ca9cb847ef6503d21f1a652c09 /drivers
parenta38f83d9014d14b7c6d0b53fd669b62684a11059 (diff)
drm/nouveau/bo: use NVIDIA's headers for move init()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/nouveau/include/nvhw/class/cl0039.h45
-rw-r--r--drivers/gpu/drm/nouveau/include/nvhw/class/cl5039.h153
-rw-r--r--drivers/gpu/drm/nouveau/include/nvhw/class/cl9039.h74
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_bo0039.c6
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_bo5039.c10
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_bo9039.c4
6 files changed, 285 insertions, 7 deletions
diff --git a/drivers/gpu/drm/nouveau/include/nvhw/class/cl0039.h b/drivers/gpu/drm/nouveau/include/nvhw/class/cl0039.h
new file mode 100644
index 000000000000..5386ed64ab72
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/include/nvhw/class/cl0039.h
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2001-2001, NVIDIA CORPORATION. All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef _cl0039_h_
+#define _cl0039_h_
+
+/* dma method offsets, fields, and values */
+#define NV039_SET_OBJECT (0x00000000)
+#define NV039_NO_OPERATION (0x00000100)
+#define NV039_SET_CONTEXT_DMA_NOTIFIES (0x00000180)
+#define NV039_SET_CONTEXT_DMA_BUFFER_IN (0x00000184)
+#define NV039_SET_CONTEXT_DMA_BUFFER_OUT (0x00000188)
+
+#define NV039_OFFSET_IN (0x0000030C)
+#define NV039_OFFSET_OUT (0x00000310)
+#define NV039_PITCH_IN (0x00000314)
+#define NV039_PITCH_OUT (0x00000318)
+#define NV039_LINE_LENGTH_IN (0x0000031C)
+#define NV039_LINE_COUNT (0x00000320)
+#define NV039_FORMAT (0x00000324)
+#define NV039_FORMAT_IN 7:0
+#define NV039_FORMAT_OUT 31:8
+#define NV039_BUFFER_NOTIFY (0x00000328)
+#define NV039_BUFFER_NOTIFY_WRITE_ONLY (0x00000000)
+#define NV039_BUFFER_NOTIFY_WRITE_THEN_AWAKEN (0x00000001)
+#endif /* _cl0039_h_ */
diff --git a/drivers/gpu/drm/nouveau/include/nvhw/class/cl5039.h b/drivers/gpu/drm/nouveau/include/nvhw/class/cl5039.h
new file mode 100644
index 000000000000..5b2ca337cf2b
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/include/nvhw/class/cl5039.h
@@ -0,0 +1,153 @@
+/*
+ * Copyright (c) 2003-2004, NVIDIA CORPORATION. All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef _cl_nv50_memory_to_memory_format_h_
+#define _cl_nv50_memory_to_memory_format_h_
+
+#define NV5039_SET_OBJECT 0x0000
+#define NV5039_SET_OBJECT_POINTER 15:0
+
+#define NV5039_NO_OPERATION 0x0100
+#define NV5039_NO_OPERATION_V 31:0
+
+#define NV5039_SET_CONTEXT_DMA_NOTIFY 0x0180
+#define NV5039_SET_CONTEXT_DMA_NOTIFY_HANDLE 31:0
+
+#define NV5039_SET_CONTEXT_DMA_BUFFER_IN 0x0184
+#define NV5039_SET_CONTEXT_DMA_BUFFER_IN_HANDLE 31:0
+
+#define NV5039_SET_CONTEXT_DMA_BUFFER_OUT 0x0188
+#define NV5039_SET_CONTEXT_DMA_BUFFER_OUT_HANDLE 31:0
+
+#define NV5039_SET_SRC_MEMORY_LAYOUT 0x0200
+#define NV5039_SET_SRC_MEMORY_LAYOUT_V 0:0
+#define NV5039_SET_SRC_MEMORY_LAYOUT_V_BLOCKLINEAR 0x00000000
+#define NV5039_SET_SRC_MEMORY_LAYOUT_V_PITCH 0x00000001
+
+#define NV5039_SET_SRC_BLOCK_SIZE 0x0204
+#define NV5039_SET_SRC_BLOCK_SIZE_WIDTH 3:0
+#define NV5039_SET_SRC_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000
+#define NV5039_SET_SRC_BLOCK_SIZE_HEIGHT 7:4
+#define NV5039_SET_SRC_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000
+#define NV5039_SET_SRC_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001
+#define NV5039_SET_SRC_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002
+#define NV5039_SET_SRC_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003
+#define NV5039_SET_SRC_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004
+#define NV5039_SET_SRC_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005
+#define NV5039_SET_SRC_BLOCK_SIZE_DEPTH 11:8
+#define NV5039_SET_SRC_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000
+#define NV5039_SET_SRC_BLOCK_SIZE_DEPTH_TWO_GOBS 0x00000001
+#define NV5039_SET_SRC_BLOCK_SIZE_DEPTH_FOUR_GOBS 0x00000002
+#define NV5039_SET_SRC_BLOCK_SIZE_DEPTH_EIGHT_GOBS 0x00000003
+#define NV5039_SET_SRC_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS 0x00000004
+#define NV5039_SET_SRC_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS 0x00000005
+
+#define NV5039_SET_SRC_WIDTH 0x0208
+#define NV5039_SET_SRC_WIDTH_V 31:0
+
+#define NV5039_SET_SRC_HEIGHT 0x020c
+#define NV5039_SET_SRC_HEIGHT_V 31:0
+
+#define NV5039_SET_SRC_DEPTH 0x0210
+#define NV5039_SET_SRC_DEPTH_V 31:0
+
+#define NV5039_SET_SRC_LAYER 0x0214
+#define NV5039_SET_SRC_LAYER_V 31:0
+
+#define NV5039_SET_SRC_ORIGIN 0x0218
+#define NV5039_SET_SRC_ORIGIN_X 15:0
+#define NV5039_SET_SRC_ORIGIN_Y 31:16
+
+#define NV5039_SET_DST_MEMORY_LAYOUT 0x021c
+#define NV5039_SET_DST_MEMORY_LAYOUT_V 0:0
+#define NV5039_SET_DST_MEMORY_LAYOUT_V_BLOCKLINEAR 0x00000000
+#define NV5039_SET_DST_MEMORY_LAYOUT_V_PITCH 0x00000001
+
+#define NV5039_SET_DST_BLOCK_SIZE 0x0220
+#define NV5039_SET_DST_BLOCK_SIZE_WIDTH 3:0
+#define NV5039_SET_DST_BLOCK_SIZE_WIDTH_ONE_GOB 0x00000000
+#define NV5039_SET_DST_BLOCK_SIZE_HEIGHT 7:4
+#define NV5039_SET_DST_BLOCK_SIZE_HEIGHT_ONE_GOB 0x00000000
+#define NV5039_SET_DST_BLOCK_SIZE_HEIGHT_TWO_GOBS 0x00000001
+#define NV5039_SET_DST_BLOCK_SIZE_HEIGHT_FOUR_GOBS 0x00000002
+#define NV5039_SET_DST_BLOCK_SIZE_HEIGHT_EIGHT_GOBS 0x00000003
+#define NV5039_SET_DST_BLOCK_SIZE_HEIGHT_SIXTEEN_GOBS 0x00000004
+#define NV5039_SET_DST_BLOCK_SIZE_HEIGHT_THIRTYTWO_GOBS 0x00000005
+#define NV5039_SET_DST_BLOCK_SIZE_DEPTH 11:8
+#define NV5039_SET_DST_BLOCK_SIZE_DEPTH_ONE_GOB 0x00000000
+#define NV5039_SET_DST_BLOCK_SIZE_DEPTH_TWO_GOBS 0x00000001
+#define NV5039_SET_DST_BLOCK_SIZE_DEPTH_FOUR_GOBS 0x00000002
+#define NV5039_SET_DST_BLOCK_SIZE_DEPTH_EIGHT_GOBS 0x00000003
+#define NV5039_SET_DST_BLOCK_SIZE_DEPTH_SIXTEEN_GOBS 0x00000004
+#define NV5039_SET_DST_BLOCK_SIZE_DEPTH_THIRTYTWO_GOBS 0x00000005
+
+#define NV5039_SET_DST_WIDTH 0x0224
+#define NV5039_SET_DST_WIDTH_V 31:0
+
+#define NV5039_SET_DST_HEIGHT 0x0228
+#define NV5039_SET_DST_HEIGHT_V 31:0
+
+#define NV5039_SET_DST_DEPTH 0x022c
+#define NV5039_SET_DST_DEPTH_V 31:0
+
+#define NV5039_SET_DST_LAYER 0x0230
+#define NV5039_SET_DST_LAYER_V 31:0
+
+#define NV5039_SET_DST_ORIGIN 0x0234
+#define NV5039_SET_DST_ORIGIN_X 15:0
+#define NV5039_SET_DST_ORIGIN_Y 31:16
+
+#define NV5039_OFFSET_IN_UPPER 0x0238
+#define NV5039_OFFSET_IN_UPPER_VALUE 7:0
+
+#define NV5039_OFFSET_OUT_UPPER 0x023c
+#define NV5039_OFFSET_OUT_UPPER_VALUE 7:0
+
+#define NV5039_OFFSET_IN 0x030c
+#define NV5039_OFFSET_IN_VALUE 31:0
+
+#define NV5039_OFFSET_OUT 0x0310
+#define NV5039_OFFSET_OUT_VALUE 31:0
+
+#define NV5039_PITCH_IN 0x0314
+#define NV5039_PITCH_IN_VALUE 31:0
+
+#define NV5039_PITCH_OUT 0x0318
+#define NV5039_PITCH_OUT_VALUE 31:0
+
+#define NV5039_LINE_LENGTH_IN 0x031c
+#define NV5039_LINE_LENGTH_IN_VALUE 31:0
+
+#define NV5039_LINE_COUNT 0x0320
+#define NV5039_LINE_COUNT_VALUE 31:0
+
+#define NV5039_FORMAT 0x0324
+#define NV5039_FORMAT_IN 7:0
+#define NV5039_FORMAT_IN_ONE 0x00000001
+#define NV5039_FORMAT_OUT 15:8
+#define NV5039_FORMAT_OUT_ONE 0x00000001
+
+#define NV5039_BUFFER_NOTIFY 0x0328
+#define NV5039_BUFFER_NOTIFY_TYPE 31:0
+#define NV5039_BUFFER_NOTIFY_TYPE_WRITE_ONLY 0x00000000
+#define NV5039_BUFFER_NOTIFY_TYPE_WRITE_THEN_AWAKEN 0x00000001
+#endif /* _cl_nv50_memory_to_memory_format_h_ */
diff --git a/drivers/gpu/drm/nouveau/include/nvhw/class/cl9039.h b/drivers/gpu/drm/nouveau/include/nvhw/class/cl9039.h
new file mode 100644
index 000000000000..b8282a615ec0
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/include/nvhw/class/cl9039.h
@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2003-2004, NVIDIA CORPORATION. All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef _cl_fermi_memory_to_memory_format_a_h_
+#define _cl_fermi_memory_to_memory_format_a_h_
+
+#define NV9039_SET_OBJECT 0x0000
+#define NV9039_SET_OBJECT_CLASS_ID 15:0
+#define NV9039_SET_OBJECT_ENGINE_ID 20:16
+
+#define NV9039_OFFSET_OUT_UPPER 0x0238
+#define NV9039_OFFSET_OUT_UPPER_VALUE 7:0
+
+#define NV9039_OFFSET_OUT 0x023c
+#define NV9039_OFFSET_OUT_VALUE 31:0
+
+#define NV9039_LAUNCH_DMA 0x0300
+#define NV9039_LAUNCH_DMA_SRC_INLINE 0:0
+#define NV9039_LAUNCH_DMA_SRC_INLINE_FALSE 0x00000000
+#define NV9039_LAUNCH_DMA_SRC_INLINE_TRUE 0x00000001
+#define NV9039_LAUNCH_DMA_SRC_MEMORY_LAYOUT 4:4
+#define NV9039_LAUNCH_DMA_SRC_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000
+#define NV9039_LAUNCH_DMA_SRC_MEMORY_LAYOUT_PITCH 0x00000001
+#define NV9039_LAUNCH_DMA_DST_MEMORY_LAYOUT 8:8
+#define NV9039_LAUNCH_DMA_DST_MEMORY_LAYOUT_BLOCKLINEAR 0x00000000
+#define NV9039_LAUNCH_DMA_DST_MEMORY_LAYOUT_PITCH 0x00000001
+#define NV9039_LAUNCH_DMA_COMPLETION_TYPE 13:12
+#define NV9039_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_DISABLE 0x00000000
+#define NV9039_LAUNCH_DMA_COMPLETION_TYPE_FLUSH_ONLY 0x00000001
+#define NV9039_LAUNCH_DMA_COMPLETION_TYPE_RELEASE_SEMAPHORE 0x00000002
+#define NV9039_LAUNCH_DMA_INTERRUPT_TYPE 17:16
+#define NV9039_LAUNCH_DMA_INTERRUPT_TYPE_NONE 0x00000000
+#define NV9039_LAUNCH_DMA_INTERRUPT_TYPE_INTERRUPT 0x00000001
+#define NV9039_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE 20:20
+#define NV9039_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_FOUR_WORDS 0x00000000
+#define NV9039_LAUNCH_DMA_SEMAPHORE_STRUCT_SIZE_ONE_WORD 0x00000001
+
+#define NV9039_OFFSET_IN_UPPER 0x030c
+#define NV9039_OFFSET_IN_UPPER_VALUE 7:0
+
+#define NV9039_OFFSET_IN 0x0310
+#define NV9039_OFFSET_IN_VALUE 31:0
+
+#define NV9039_PITCH_IN 0x0314
+#define NV9039_PITCH_IN_VALUE 31:0
+
+#define NV9039_PITCH_OUT 0x0318
+#define NV9039_PITCH_OUT_VALUE 31:0
+
+#define NV9039_LINE_LENGTH_IN 0x031c
+#define NV9039_LINE_LENGTH_IN_VALUE 31:0
+
+#define NV9039_LINE_COUNT 0x0320
+#define NV9039_LINE_COUNT_VALUE 31:0
+#endif /* _cl_fermi_memory_to_memory_format_a_h_ */
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo0039.c b/drivers/gpu/drm/nouveau/nouveau_bo0039.c
index e00ec7cfce5f..8f1f78b0105d 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo0039.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo0039.c
@@ -32,6 +32,8 @@
#include <nvif/push006c.h>
+#include <nvhw/class/cl0039.h>
+
static inline uint32_t
nouveau_bo_mem_ctxdma(struct ttm_buffer_object *bo,
struct nouveau_channel *chan, struct ttm_mem_reg *reg)
@@ -94,7 +96,7 @@ nv04_bo_move_init(struct nouveau_channel *chan, u32 handle)
if (ret)
return ret;
- PUSH_NVSQ(push, NV039, 0x0000, handle);
- PUSH_NVSQ(push, NV039, 0x0180, chan->drm->ntfy.handle);
+ PUSH_MTHD(push, NV039, SET_OBJECT, handle);
+ PUSH_MTHD(push, NV039, SET_CONTEXT_DMA_NOTIFIES, chan->drm->ntfy.handle);
return 0;
}
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo5039.c b/drivers/gpu/drm/nouveau/nouveau_bo5039.c
index 19fb36b35ff9..232877f8b93d 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo5039.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo5039.c
@@ -33,6 +33,8 @@
#include <nvif/push206e.h>
+#include <nvhw/class/cl5039.h>
+
int
nv50_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
struct ttm_mem_reg *old_reg, struct ttm_mem_reg *new_reg)
@@ -111,9 +113,9 @@ nv50_bo_move_init(struct nouveau_channel *chan, u32 handle)
if (ret)
return ret;
- PUSH_NVSQ(push, NV5039, 0x0000, handle);
- PUSH_NVSQ(push, NV5039, 0x0180, chan->drm->ntfy.handle,
- 0x0184, chan->vram.handle,
- 0x0188, chan->vram.handle);
+ PUSH_MTHD(push, NV5039, SET_OBJECT, handle);
+ PUSH_MTHD(push, NV5039, SET_CONTEXT_DMA_NOTIFY, chan->drm->ntfy.handle,
+ SET_CONTEXT_DMA_BUFFER_IN, chan->vram.handle,
+ SET_CONTEXT_DMA_BUFFER_OUT, chan->vram.handle);
return 0;
}
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo9039.c b/drivers/gpu/drm/nouveau/nouveau_bo9039.c
index 995ebe7ffe00..785d831e5d18 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo9039.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo9039.c
@@ -32,6 +32,8 @@
#include <nvif/push906f.h>
+#include <nvhw/class/cl9039.h>
+
int
nvc0_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
struct ttm_mem_reg *old_reg, struct ttm_mem_reg *new_reg)
@@ -79,6 +81,6 @@ nvc0_bo_move_init(struct nouveau_channel *chan, u32 handle)
if (ret)
return ret;
- PUSH_NVSQ(push, NV9039, 0x0000, handle);
+ PUSH_MTHD(push, NV9039, SET_OBJECT, handle);
return 0;
}