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author | Vitaly Kuznetsov <vkuznets@redhat.com> | 2019-08-22 10:36:30 +0200 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2019-08-23 16:59:54 +0200 |
commit | 3e2d94535adb2df15f3907e4b4c7cd8a5a4c2b5a (patch) | |
tree | aa53940e9cf060d6afd783cdaeea0a998101722a /drivers/visorbus/controlvmchannel.h | |
parent | bd00cd52d5be655a2f217e2ed74b91a71cb2b14f (diff) |
clocksource/drivers/hyperv: Enable TSC page clocksource on 32bit
There is no particular reason to not enable TSC page clocksource on
32-bit. mul_u64_u64_shr() is available and despite the increased
computational complexity (compared to 64bit) TSC page is still a huge win
compared to MSR-based clocksource.
In-kernel reads:
MSR based clocksource: 3361 cycles
TSC page clocksource: 49 cycles
Reads from userspace (utilizing vDSO in case of TSC page):
MSR based clocksource: 5664 cycles
TSC page clocksource: 131 cycles
Enabling TSC page on 32bits allows to get rid of CONFIG_HYPERV_TSCPAGE as
it is now not any different from CONFIG_HYPERV_TIMER.
Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Michael Kelley <mikelley@microsoft.com>
Link: https://lkml.kernel.org/r/20190822083630.17059-1-vkuznets@redhat.com
Diffstat (limited to 'drivers/visorbus/controlvmchannel.h')
0 files changed, 0 insertions, 0 deletions