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authorCaesar Wang <wxt@rock-chips.com>2016-05-03 10:23:50 +0800
committerEduardo Valentin <edubezval@gmail.com>2016-05-17 07:28:33 -0700
commit2fe5c1b0453c445f8a19e1a53f8297b21c2cba4c (patch)
tree82c3dd32983051769ba6281d5fea89fde4c65e70 /drivers/thermal
parent678065d5b786763cb9f5d97673409ae32ead2314 (diff)
thermal: rockchip: use the usleep_range instead of udelay
Documentation/timers/timers-howto.txt recommends to use usleep_range on delays > 10usec. The usleep_range indeed reduces CPU load, since the udelay will busy wait for enough loop cycles to achieve the desired delay. Fixes commit b06c52db39fd ("thermal: rockchip: handle the power sequence for tsadc controller"). Cc: Zhang Rui <rui.zhang@intel.com> Cc: Eduardo Valentin <edubezval@gmail.com> Cc: Heiko Stuebner <heiko@sntech.de> Suggested-by: Eduardo Valentin <edubezval@gmail.com> Signed-off-by: Caesar Wang <wxt@rock-chips.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
Diffstat (limited to 'drivers/thermal')
-rw-r--r--drivers/thermal/rockchip_thermal.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index 86a1ab04bf95..5d491f16a866 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -547,10 +547,10 @@ static void rk_tsadcv3_initialize(struct regmap *grf, void __iomem *regs,
regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_TSEN_PD_ON);
mdelay(10);
regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_TSEN_PD_OFF);
- udelay(100); /* The spec note says at least 15 us */
+ usleep_range(15, 100); /* The spec note says at least 15 us */
regmap_write(grf, GRF_SARADC_TESTBIT, GRF_SARADC_TESTBIT_ON);
regmap_write(grf, GRF_TSADC_TESTBIT_H, GRF_TSADC_TESTBIT_H_ON);
- udelay(200); /* The spec note says at least 90 us */
+ usleep_range(90, 200); /* The spec note says at least 90 us */
}
if (tshut_polarity == TSHUT_HIGH_ACTIVE)