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authorJani Nikula <jani.nikula@intel.com>2016-09-16 16:59:48 +0300
committerJani Nikula <jani.nikula@intel.com>2016-09-26 12:14:05 +0300
commit3ec92362cda4c4a2c1ba699b6e8f2cc2e3b4306a (patch)
tree96817dc1a14e0f4791f85491666810e2960124e4 /drivers/gpu/drm/i915/intel_ringbuffer.c
parent3be192e92ddcad15f7bf6b4b9e3f195eb8c1fe76 (diff)
drm/i915/skl: drop workarounds for F0 revision
Pre-production hardware is not supported. Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/e5433e6430dcfd941209c4d8103035ddb13d17b4.1474034059.git.jani.nikula@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_ringbuffer.c')
-rw-r--r--drivers/gpu/drm/i915/intel_ringbuffer.c6
1 files changed, 0 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 68dc27f6ba0a..67ea9dd5921e 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1007,12 +1007,6 @@ static int skl_init_workarounds(struct intel_engine_cs *engine)
I915_WRITE(GEN8_GARBCNTL, (I915_READ(GEN8_GARBCNTL) |
GEN9_GAPS_TSV_CREDIT_DISABLE));
- /* WaDisableSbeCacheDispatchPortSharing:skl */
- if (IS_SKL_REVID(dev_priv, 0, SKL_REVID_F0))
- WA_SET_BIT_MASKED(
- GEN7_HALF_SLICE_CHICKEN1,
- GEN7_SBE_SS_CACHE_DISPATCH_PORT_SHARING_DISABLE);
-
/* WaDisableGafsUnitClkGating:skl */
WA_SET_BIT(GEN7_UCGCTL4, GEN8_EU_GAUNIT_CLOCK_GATE_DISABLE);